TSMC Expected to Begin 'A14' 5nm Chip Production in Second Quarter

[cmaier]

Apple designs chips they don't make them so the credit for 5nm goes to the foundries like TSMC.

7 nm process - Wikipedia

wikipedia.org

What's really silly is assume a single stat tells the whole story. Transistor density is what matters most. Intel's 10nm x86 is twice as dense as 10nm ARM & still more than 7nm ARM. While chip benchmarking is like dick measuring as it doesn't indicate actual performance in real world tasks.

I wouldn’t say density matters most, unless you are talking about SRAM structures like caches. For logic, we intentionally space devices out (for bypass cap, IR drop issues, thermal issues, DFM issues, etc). And the last time I checked the design rules, Intel’s 10nm has almost identical minimum spacing rules to the latest node from TSMC on 7nm. In my entire career designing CPUs I can’t think of a single time I used a minimum sized transistor, so in the real world the fact that an Intel minimum size transistor is a tad bit smaller than a TSMC minimum size transistor matters not one iota.

 

[uberzephyr]

Qualcomm doesn't fab chips.

Qualcomm fabs chips in the same way that AMD and Apple do (and most other chip design companies): they utilize an external foundry.
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Has a standard been set for measuring the nm of an architecture, or does each company still use it's own metric?

What they use are not so much their own metric as their own naming conventions. Somewhere below 28nm the technology node naming stopped having anything to do with any physical measurement on the chip. The only thing that is consistent is: if the number got smaller, it is a newer (and smaller by some amount) technology.

There is a somewhat consistent metric that involves the product of CPP (contacted poly pitch) and MMP (minimum metal pitch), but you won't see that reflected in the actual technology node name.

This is a reasonable summary: WikiChip technology_node

 

[Spungoflex]

Still curious to see towards what all this processing power will go.

Laptops and desktops, hopefully.

We really have reached the point where these CPUs are complete overkill for a phone.

 

[gkarris]

Laptops and desktops, hopefully.

We really have reached the point where these CPUs are complete overkill for a phone.

X15's in the new Mac Mini's released amidst the Sony PS5 and Microsoft Xbox One Series X...


you're welcome...

 

[cmaier]

Laptops and desktops, hopefully.

We really have reached the point where these CPUs are complete overkill for a phone.

I’ll believe that when apps and OS features like Siri don’t need to phone home for processing.

 

[rp2011]

Wondering if the 2020 iPads will be receiving the new A14 or a revised A13X

 

[MacBH928]

$25 billion investment just to keep exclusive deal with iphone?
How much money do they make? $25 billion is probably more than the economy of many countries.

Also, after we reach 5nm, is this it for humanity? have we hit the peak CPU speeds?

 

[techwhiz]

5nm - wow, and Intel can't get to 10mn

5nm is the smallest feature size, that does not mean that all features are 5nm.
So depending on the process unless you know all parameters 5nm means nothing.
Intel 10nm is denser than TSMC 7nm.
That is moot because TSMC 7nm+ is now denser than Intel 10nm.

Once again 5nm does not necessarily equal huge shrink from 7nm unless all features have scaled.

 

[MikhailT]

Deleted.

 

[techwhiz]

Just slap 8 A14s in there & call it a day!

That won't work.
You need multi socket support.

 

[norbinhouston]

Its just marketing, Steve Jobs was a con man, China uses child labor to make apple products, their stock is going to crash. Did I cover all the bullet point for the haters?

 

[techwhiz]

I wouldn’t say density matters most, unless you are talking about SRAM structures like caches. For logic, we intentionally space devices out (for bypass cap, IR drop issues, thermal issues, DFM issues, etc). And the last time I checked the design rules, Intel’s 10nm has almost identical minimum spacing rules to the latest node from TSMC on 7nm. In my entire career designing CPUs I can’t think of a single time I used a minimum sized transistor, so in the real world the fact that an Intel minimum size transistor is a tad bit smaller than a TSMC minimum size transistor matters not one iota.

People don't get it.
They see 5nm and they think that all features are 5nm, etc.
The one thing people seem to miss is that wires don't get any faster and smaller wires work against increased speed.
Smaller wires limit current capacity; therefore it also means that large capacitive loads cannot be drive with smaller wires.

Try driving a 3GHz clock tree with minimum wire sizing and small buffers.
Yeah, that doesn't work.
You want a square wave, you'll get a sawtooth if you do it wrong. maybe not even that.
Also at 5nm spacing, signal integrity becomes even a bigger nightmare.

Anyway, 5nm, means nothing except minimum features size and like you and I said, Intel 10nm is as dense as TSMC 7nm.

 

[kemal]

Because intel makes real chips, not baby mobile chip crap like Apple. Silly comparison.

Yes, and TSMC's 7nm process node produces mobile crap Apple chips as well as the chiplets that make up the 64 core, 128 thread $7k Epyc Rome server crap chip for AMD, which can run Crysis.

 

[junkw]

What is the approx price Apple pays TSMC for each A14? 50$? 100$? 300$?

25bn$ investment is quite a lot

 

[cmaier]

People don't get it.
They see 5nm and they think that all features are 5nm, etc.
The one thing people seem to miss is that wires don't get any faster and smaller wires work against increased speed.
Smaller wires limit current capacity; therefore it also means that large capacitive loads cannot be drive with smaller wires.

Try driving a 3GHz clock tree with minimum wire sizing and small buffers.
Yeah, that doesn't work.
You want a square wave, you'll get a sawtooth if you do it wrong. maybe not even that.
Also at 5nm spacing, signal integrity becomes even a bigger nightmare.

Anyway, 5nm, means nothing except minimum features size and like you and I said, Intel 10nm is as dense as TSMC 7nm.

Plus wires get narrower much faster than they get thinner, so if you shove them close together (yay, density!) you get more capacitance, and it’s really bad capacitance because of crosstalk (Yay, hold time AND setup time failures), blah blah blah.

 

[falainber]

5nm is the smallest feature size, that does not mean that all features are 5nm.
So depending on the process unless you know all parameters 5nm means nothing.
Intel 10nm is denser than TSMC 7nm.
That is moot because TSMC 7nm+ is now denser than Intel 10nm.

Once again 5nm does not necessarily equal huge shrink from 7nm unless all features have scaled.

I believe it's not even the size of the smallest feature. It's just a moniker.

 

[cmaier]

I believe it's not even the size of the smallest feature. It's just a moniker.

The newest 7nm node at TSMC has a fin width around 6nm, I believe. Used to be it would refer to the gate width, but that’s somewhat meaningless in a finFet.

 

[manu chao]

Laptops and desktops, hopefully.

We really have reached the point where these CPUs are complete overkill for a phone.

You might underestimate how much processing power you can throw at image analysis and modification, in particular, those of the moving images kind. All the while that line is getting blurred with the iPhone still camera already recording full-size images at a decent frame rate constantly when the camera app is open to allow for pre-capture (ie, using images taken before the shutter button is pressed) and merging an increasing number of images per still image.

And all that is from a 12 MP camera (or, to be precise, up to three 12 MP cameras). Samsung Semiconductor already offers a smartphone-ish sensor (1/1.33") with over 100 MP (though that is a quad-bayer sensor, the full resolution might not be used that often or too far into the processing chain).
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I’ll believe that when apps and OS features like Siri don’t need to phone home for processing.

If I remember it correctly, this is not just a question of processing power but also of either storage size or RAM size. Google reported last year that they had managed to put voice recognition (or even more of 'Ok, Google') onto the phone itself by improving the algorithms such that either the amount of RAM required (or storage space) fell below a threshold that made it possible to embed/run it on the phone.

 

[0924487]

TSMC is 2.5 years ahead of Samsung Semiconductor Co. and 7+ years ahead of intel fabs.

 

[BvizioN]

Because intel makes real chips, not baby mobile chip crap like Apple. Silly comparison.

Not silly at all. Soon these "baby" chips will be the future of chips.

The last time I checked these baby mobile chips are performing as fast as those real chips

What's silly is quick dismissiveness of apple's innovation

 

[iPadified]

Apple wouldn't release an iPad Pro with an A13X chip only to quietly upgrade it to an A14X chip a few months later, right?

Not likely. They could however make a 5nm A13X in the spring 2020. I think they did that before where the A10 was at 16 nm, the A10X at 10 nm and the A11 at 10 nm. The A10X came in the spring and the A11 in autumn the same year if I do not recall it incorrectly.

 

[manu chao]

Not likely. They could however make a 5nm A13X in the spring 2020. I think they did that before where the A10 was at 16 nm, the A10X at 10 nm and the A11 at 10 nm. The A10X came in the spring and the A11 in autumn the same year if I do not recall it incorrectly.

That is correct, and this was the prelude for the first (and so far only) time of the iPad skipping an A-series generation (there was no iPad with an A11 or A11X SoC). However, the iPad started out with getting its A-series chip before the iPhone (A4: original iPad January 2010 & iPhone 4 June 2010) to getting it around the same time or later, which like the skipping of the A11 was the consequence of the iPad having a longer cycle than the iPhone.

As this longer cycle continues, the iPad will have to skip another generation. It could be the A14 that will be skipped if there is a new iPad (Pro) in the first half of 2020 or the A13 if there is no new iPad until the fall.

However, there is one precedent for a relatively quiet CPU update of the iPad with the 4th gen iPad which moved from A5X to A6X with very few other changes (Lightning, better FaceTime camera, better LTE).

 

[iPadified]

That is correct, and this was the prelude for the first (and so far only) time of the iPad skipping an A-series generation (there was no iPad with an A11 or A11X SoC). However, the iPad started out with getting its A-series chip before the iPhone (A4: original iPad January 2010 & iPhone 4 June 2010) to getting it around the same time or later, which like the skipping of the A11 was the consequence of the iPad having a longer cycle than the iPhone.

As this longer cycle continues, the iPad will have to skip another generation. It could be the A14 that will be skipped if there is a new iPad (Pro) in the first half of 2020 or the A13 if there is no new iPad until the fall.

However, there is one precedent for a relatively quiet CPU update of the iPad with the 4th gen iPad which moved from A5X to A6X with very few other changes (Lightning, better FaceTime camera, better LTE).

I have forgotten about the this. Yes the A5X to A6X was quick update but I think that was because A5X had difficulties to drive the retina display on iPad 3. I do not see that is an issue with a putative A13X.

The A13 is 98 mm2 and the X chips are 50% larger. A node shrink would be needed to avoid a 150mm2 chip A13X/A14X. The A5X was 165 mm2 and the largest of them all and rapidly replaced with a smaller A6X (123 mm2).

I agree, with the current 18 month cycle some generations will be skipped. My A9X iPad is still OK for normal office use.

 

[ElZamo92]

Im not sure if TSMC’s 5nm node is mature enough to produce massive amounts of chips... Their 7nm node is still quite far from perfection, so I’ll be impressed if they can successfully Chen out millions of 5nm chips this year.
My guess is that they’ll make this year’s chips in a more mature 7nm process and switch to 5nm next year.

 

[Falhófnir]

There is some hope that when those 5 nm A14 chips ship in iPhones in September, Intel might also have managed to ship 10 nm chips in large quantities. Moreover, Intel and TSMC define the size of the process node differently (it depends on which part of, eg, a transitor you measure). Intel's 10 nm process is much closer to TSMC's 7 nm process than to TSMC's 10 nm process.

That still means that Intel is about one process node step behind.

Traditionally that's been the case, and was also set to be the case with Intel's original 10nm design. Unfortunately what tripped them up was transistor density (from an interview with Brian Krzanich) so in order to get 10nm working at all, that was scrapped and what we now have is basically just Kaby Lake refresh scaled down to 10nm. There's little if any density increase, just higher clock speeds and other general refinements like they applied to the various 14nm designs. That's why Ice lake is pretty underwhelming and more comparable to Kaby Lake over Skylake than Broadwell over Haswell. There is a rumour of Intel trying to short shift to 7nm, whether that will finally come with a significant density increase and the sort of generational improvements we were used to before 2015 is yet to be seen. I'm going to be in the market for a new gaming laptop in the next year or two, so I'd certainly like to see Intel underway again, now they've (just about) managed to refloat themselves off the 10nm rock they hit.