Updating a Mac (Pro)s CPU Microcode

[tsialex]

Wasted 30 mins

So where does that leave my initial question?

Will have a look at the vid later.

Sorry for the wrong video, but even I’m mistaken and it’s pin compatible, how do you enable the other cores without the source/more info about the firmware?

Enabling cores it’s not work of the microcode part. Take a look on Xserve3,1 + Westmere microcode updates. Hexacores still don’t work on them.

 

[LightBulbFun]

you and @Daniël Oosterhuis are both right LOL

the pinout is diffrent

but it does work if you know what your doing, but only 2 Cores where activated due to certain DSDT/APIC stuff

and it would never boot up an OS properly Just Randomly lock up at places

if you want more info on Mobile Core 2 Quads in unsupported machines look up Core 2 Quad Thinkpad T61.

(I work with @dosdude1 on a lot of the projects he does, and I was able to work with him to get the Core 2 Quad to POST but never Boot an OS sadly, we suspect its due the shonky cooling system we had to rig up or the VRM of the MacBook not being able to handle the additional load, he actually soldered a CPU socket to a MacBook5,2 Motherboard which was fun )

 

[DADAAA]

Hi!

Who wanted to compare the 2.1/3.1 Mainboards?
Any movement?


Greets


PS: And, how big are the chances to modify a 3.1 ROM for a 2.1 MP to get a better boot process?

 

[UCDHIUS]

So has anyone had any luck with putting X5687s in 4,1 cMP?

Or possibly over clocking the 4,1-5,1 cMP with x5680s or x5690s? If someone ever figures out a way that would be so amazing.

 

[JedNZ]

Do you mean just installing X5680 or X5690 in cMP 4,1 or 5,1, or overclocking the X5680 or X5690 in cMP 4,1 or 5,1? With a firmware hack on a cMP 4,1 taking it to a 5,1 we can already use X5680 or X5690.

 

[UCDHIUS]

So now that we have microcode tools to edit dumps. Is it possible to add microcode edits to add the SLB cpus for the cMP 3,1 or latest microcode updates? ill have a 3,1 to mess around with here soon.. Anyone want to try this?
[doublepost=1535626537][/doublepost]

So now that we have microcode tools to edit dumps. Is it possible to add microcode edits to add the SLB cpus for the cMP 3,1 or latest microcode updates? ill have a 3,1 to mess around with here soon.. Anyone want to try this?

@LightBulbFun @tsialex

 

[LightBulbFun]

So now that we have microcode tools to edit dumps. Is it possible to add microcode edits to add the SLB cpus for the cMP 3,1 or latest microcode updates? ill have a 3,1 to mess around with here soon.. Anyone want to try this?
[doublepost=1535626537][/doublepost]

@LightBulbFun @tsialex

the tools are a nice convenience but you dont need them to replace microcodes (if you read the start of this thread you can see I did this before any such tools existed, by getting freaky with a hex editor )

the reason I have not "done anything" on the MP3,1 front is I dont own a MP3,1 to do any testing,

I have theorised that instruction set bug that plagues 1067A (1067A is the CPUID of the SLB series Harpertowns) CPUs on PCs, may be preventing the MP3,1 from Passing POST (perhaps the EFI is trying to use an instruction set that dosent get exposed thanks to the bug) I also IIRC 1067A CPUs will not Post in an iMac7,1 while 10676 CPUs will POST in an iMac7,1 which lends credence to this theory (the iMac7,1 dosent have any microcode or official support for any 1067x CPU)

1067A CPUs have a bug where if the BootROM dosent have microcode for them that several instruction sets go missing (including SSE4.1 VT-x and an instruction set that is needed to boot Windows 8.1+ 64bit) you can read about it on the whole LGA771 modding Scene.

if I do get a MacPro3,1/Xserve2,1 I will defiantly be doing some testing, I already have a 1067A L5410 harpertown CPU on hand for testing

 

[tsialex]

the tools are a nice convenience but you dont need them to replace microcodes (if you read the start of this thread you can see I did this before any such tools existed, by getting freaky with a hex editor )

the reason I have not "done anything" on the MP3,1 front is I dont own a MP3,1 to do any testing,

I have theorised that instruction set bug that plagues 1067A (1067A is the CPUID of the SLB series Harpertowns) CPUs on PCs, may be preventing the MP3,1 from Passing POST (perhaps the EFI is trying to use an instruction set that dosent get exposed thanks to the bug) I also IIRC 1067A CPUs will not Post in an iMac7,1 while 10676 CPUs will POST in an iMac7,1 which lends credence to this theory (the iMac7,1 dosent have any microcode or official support for any 1067x CPU)

1067A CPUs have a bug where if the BootROM dosent have microcode for them that several instruction sets go missing (including SSE4.1 VT-x and an instruction set that is needed to boot Windows 8.1+ 64bit) you can read about it on the whole LGA771 modding Scene.

if I do get a MacPro3,1/Xserve2,1 I will defiantly be doing some testing, I already have a 1067A L5410 harpertown CPU on hand for testing

I have two 3,1 and a spare logic board that one RAM slot don't work anymore, but none 1067A CPUs. What would be a good and cheap candidate for testing?

 

[LightBulbFun]

I have two 3,1 and a spare logic board that one RAM slot don't work anymore, but none 1067A CPUs. What would be a good and cheap candidate for testing?

I would search for LGA 771 CPU and sort by price lowest first.

generally an E5405/E5410/L5410 or such will crop up for 2 or 3 quid and in this case just make sure its of the SLBxx sSpec to get a 1067A CPU

http://www.cpu-world.com/CPUs/Xeon/TYPE-Xeon 5400.html heres a list of all the Harpertown CPUs intel made, just find one thats SLBxx

 

[tsialex]

I would search for LGA 771 CPU and sort by price lowest first.

generally an E5405/E5410/L5410 or such will crop up for 2 or 3 quid and in this case just make sure its of the SLBxx sSpec to get a 1067A CPU

http://www.cpu-world.com/CPUs/Xeon/TYPE-Xeon 5400.html heres a list of all the Harpertown CPUs intel made, just find one thats SLBxx

I’ve found one E5405 SLBPP, but it’s almost $15 down here

 

[LightBulbFun]

I’ve found one E5405 SLBPP, but it’s almost $15 down here

View attachment 778838

it dosent have to be an E5405 it can be any 54xx CPU as long as its SLBxx

have you checked some of the Chinese listings on ebay.com? might take a while to arrive but hopefully they will be cheap with free shipping.

heres a E5410 for less then $2 however shipping to brazil looks a bit ridiculous maybe its worth contacting the seller? https://www.ebay.com/itm/192630100116 (mod note: not my auction)

 

[tsialex]

it dosent have to be an E5405 it can be any 54xx CPU as long as its SLBxx

have you checked some of the Chinese listings on ebay.com? might take a while to arrive but hopefully they will be cheap with free shipping.

heres a E5410 for less then $2 however shipping to brazil looks a bit ridiculous maybe its worth contacting the seller? https://www.ebay.com/itm/192630100116 (mod note: not my auction)

Usually I buy CPUs from AliExpress, but lately everything arrives after 90 days and to make matters worse, Brazilian post office started to charge a fee of $4 for every package from overseas. Sometimes it’s better to just buy locally.

I’ll search better locally, only found one 771 SLB in my first search.

 

[Traace]

For that Mac Pro 1,1 & harpertown.

It might be that SMC cant detect harpertown cpu temp or getting bad values. It would not POST then. But in that case over temp LED should light up.

Curious now if its possible to use a 3,1 flashed SMC together with xucode in our cMP 1,1 & 2,1 .

 

[LightBulbFun]

For that Mac Pro 1,1 & harpertown.

It might be that SMC cant detect harpertown cpu temp or getting bad values. It would not POST then. But in that case over temp LED should light up.

Curious now if its possible to use a 3,1 flashed SMC together with xucode in our cMP 1,1 & 2,1 .

no the OverTemp LED never lit up

it would turn on and then do nothing.

and Like I said in a previous post, if I then put Microcodes in i would get a CPU_HLT LED light up (which is diffrent from the CPU overtemp LED) but the MP1,1/2,1 and XS1,1 does this regardless of the CPU if you put in microcodes that did not exist prior. but it does show it was getting far enough along to attempt to load the microcodes it seems


(this whole Halt when you add new microcodes where a previous version of that microcode does not exist in EFI, seems to be a XS1,1/MP1,1/2,1 specific thing as someone in this thread was able to add Penryn Microcodes to an iMac7,1 and it continued to run just fine with the Penryn CPU)

 

[DADAAA]

So, we need a talented hacker who decompiles the 1,1/2,1/3,1 efi (-dumps) to see why the first two react so strange to the added microcode?

 

[Inspector42]

As far as I understand it the microcode embedded in the firmware or for that matter in the operating system is only needed to address any errata (bugs in the processor detected after production) - it should really only be needed for a proper boot if there is a severe issue preventing the OS to run properly with the original microcode. Of course in order to fix Spectre, microcode updates would be needed.
To the contrary, if you upload the wrong microcode the processor may stop working properly.

I have spend some time reading through the data sheets of the XEON 5300 and XEON 5400.
There is a difference in the use of TESTHI* PINs, which may create an issue as unused (reserved) pins are supposed to be left open while the TESTHI*-Pins are supposed to be terminated by dedicated resistors.

                    XEON 5300                                     XEON 5400
Signal Name  Pin #   Type                      Signal Name  Pin #   Type
RESERVED     AE3                               TESTHI12     AE3     Power/Other     Input
TESTHI00     F26     Power/Other     Input     RESERVED     F26        
TESTHI01     W3      Power/Other     Input     RESERVED     W3        
TESTHI02     F25     Power/Other     Input     RESERVED     F25        
TESTHI03     G25     Power/Other     Input     RESERVED     G25        
TESTHI04     G27     Power/Other     Input     RESERVED     G27        
TESTHI05     G26     Power/Other     Input     RESERVED     G26        
TESTHI06     G24     Power/Other     Input     RESERVED     G24        
TESTHI07     F24     Power/Other     Input     RESERVED     F24

Core Voltages are also different due to different lithography (65nm vs. 45 nm), but both refer to the same voltage regulator specification and hence Xeon 5400 should work in MacPro 1,1/2,1 even though its core voltage is 0.85V-1.35V compared to 1.00V-1,50V for the Xeon 5300.
There is also a different code posted on the two pins MS_ID0 and MS_ID 1 (Market Segment Selection), which might be read by the firmware or SMC and used to block certain processors (XEON 5300 posts 0b10, XEON 5400 posts 0b11 on these two pins).

There might also be a difference in the MSRs (machine specific registers), but I don´t have time to review those right now. They are described in the Intel® 64 and IA-32 Architectures Developer's Manual (Volume 4, Chapter 2) if someone is interested. Those need to be properly initialized by the EFI firmware.

There is also another key difference between the MacPro 1,1/2,1 and Mac3,1: Only the MacPro 3,1 has a 64Bit EFI, MacPro 1,1 and 2,1 still have 32Bit EFI, despite using 64Bit processors. That could explain the weird behaviour when adding microcode extracted from later MacPro´s firmware.

Based on that I am afraid using a Harpertown Processor in the MacPro1,1/Mac2,1 will not be a walk in the park and besides changes to the EFI changes to the mainboard may also be needed.
Embedding the latest microcode is then the icing on the cake, by itself I don´t think it will enable the use of a specific processor.

 

[Larsvonhier]

                    XEON 5300                                     XEON 5400
Signal Name  Pin #   Type                      Signal Name  Pin #   Type
RESERVED     AE3                               TESTHI12     AE3     Power/Other     Input
TESTHI00     F26     Power/Other     Input     RESERVED     F26      
TESTHI01     W3      Power/Other     Input     RESERVED     W3      
TESTHI02     F25     Power/Other     Input     RESERVED     F25      
TESTHI03     G25     Power/Other     Input     RESERVED     G25      
TESTHI04     G27     Power/Other     Input     RESERVED     G27      
TESTHI05     G26     Power/Other     Input     RESERVED     G26      
TESTHI06     G24     Power/Other     Input     RESERVED     G24      
TESTHI07     F24     Power/Other     Input     RESERVED     F24

Core Voltages are also different due to different lithography (65nm vs. 45 nm), but both refer to the same voltage regulator specification and hence Xeon 5400 should work in MacPro 1,1/2,1 even though its core voltage is 0.85V-1.35V compared to 1.00V-1,50V for the Xeon 5300.
There is also a different code posted on the two pins MS_ID0 and MS_ID 1 (Market Segment Selection), which might be read by the firmware or SMC and used to block certain processors (XEON 5300 posts 0b10, XEON 5400 posts 0b11 on these two pins).

Very good findings, perhaps I´ll spend some misty november weekends trying to get proper access to the Xeon sockets of one of my MP 2,1 machines. It might be feasible to insulate the pins that are "reserved" (n.c.) for the 5400 using some kind of flex PCB, also leading out the AE3 test pin.
Will also have a look at the intel docs to find out where the TestHi00 to 07 pins went.

Thanks for sharing!

 

[Inspector42]

Very good findings, perhaps I´ll spend some misty november weekends trying to get proper access to the Xeon sockets of one of my MP 2,1 machines. It might be feasible to insulate the pins that are "reserved" (n.c.) for the 5400 using some kind of flex PCB, also leading out the AE3 test pin.
Will also have a look at the intel docs to find out where the TestHi00 to 07 pins went.

Thanks for sharing!

If you have the opportunity to disassemble you Mac that would be great. Mine is still in use and I cannot afford to have it taken apart.
I have not been able to figure out what the purpose of the TestHixx-Pins is - my suspicion is that they are used for testing in production.
If you really get to the pins you may want to verify if the board fully follows the intel spec - in the early days of the 8-Bit Computers I regularly ran into inconsistencies because it was easier for the design and worked anyway. It is very unlikely this is still the case in today‘s complex setup but easy to check before you irreversibly damage the board for no good reason.
Considering that MacPro3,1 are available online for around €200 I suggest that this exercise is only worth it for the fun and learning experience.

 

[Larsvonhier]

Small change of my plans. I´m about to buy some bare Mac Pro PCB mainboard and save the disassembly stage at this time. Hopefully I can figure out the test pin differences this way.
As you´re totally right about the remaining values and prices of cMP 3,1 it would still be a big deal of getting SSE4,x support as that would mean macOS >> El Capitan for those boxes.
And I´d really love to see 2006 hardware performing with up-to-date OS in 2018 ;-)

 

[Larsvonhier]

I got hold on two defective MP 1,1 boards. Mapping the pins can start any time soon. I´ll print a map of the socket/processor pins so that I can easily enter my findings/measurements there.

 

[Larsvonhier]

Here´s the comparison of the reserved land pads of 5300 vs. 5400 processors.
Also shown: The different TestHi_xx locations and the TestIn1 and TestIn2 (description of their respective termination varies a bit, measurements will show if both manuals actually mean the same).

 

[passmaster16]

Has anybody tried the C0 54xx cpu stepping in a Mac Pro 1,1 or 2,1? I’m certain this has been tried before and failed but couldn’t find any definitive threads other than people saying it wouldn’t work. We know the green creek 5000x chipset can support the 54xx 1333 MHz fsb cpus. It seems like PC vendors added support on 5000x boards through bios updates so do we really need an efi update to make Harpertown boot on gen 1/2 Mac pros? On the other hand the earlier linked article talks about hardware mods which I’d love to know what those would be considering the chipset is already compatible.

It seems that the SLAxx series are the only cpus that have been used in the 3,1 so it’s not surprising that the SLBxx l5410 failed in @LightBulbFun 1,1. Getting that stepping to work may be impossible considering Apple never used it on any of the Mac pros.

 

[LightBulbFun]

I was thinking exactly this, sadly I dont have any C0 Harpertown CPUs on hand

(the CPUs I did order where meant to be C0 but as mentioned in my post at the time sadly the seller sent me an E0 CPU)

but the E0 CPU is still handy for when I get a MP3,1/XS2,1 into the collection so I can try and get E0 harper towns working and in extension the X5492 hopefully

 

[passmaster16]

I know some people have mentioned that the issue could be power related as the Harpertown CPUs are lower than some of the Clovertowns. However if you look at the specs for certain Woodcrest CPUs that are compatible with the Mac Pro 1,1 some have a core voltage spec of 0.85V - 1.5V so not much different from the 0.85V - 1.35V of the X5460 for example. Wouldn't the existing voltage regulator be able to handle this difference?

There was somebody on Netkas forum who attempted to install E5410s and was unsuccessful, CPU B error light and no chime. However we do not know what stepping he was using. In that same thread somebody talked about having 5450s to try, again no stepping was mentioned, but I assumed it was not successful as there was no followup on that post. He was still running 5355s. Also mentioned in that thread was maybe an update to the SMC was needed in order to properly manage power on the CPU.

This guy tried to use a single 5470 which was unsuccessful with no boot chime. The 5470 is only available in SLBxx/1067A wrong stepping so I don't put much stock in this test.

I think @Inspector42 might be on the right track with regard to the initialization of the MSRs. @hyram had a post here that talked about the EFI or BIOS on a PC needing to be able to initialize the CPU. Could this initialization or lack thereof be somehow influenced by something in the hardware? After all there's no reason for us to believe that anand's post about a Mac Pro 1,1 needing hardware modifications (s meaning plural), is inaccurate. Assuming the voltage is ok, what other hardware modifications would be required?

Finally it is true that Supermicro provided support on 5000x series chipset motherboards through a Bios update (no hardware modification needed). However I found a thread on Dell forums about their PowerEdge 1900 servers with 5000P chipset (similar to the 5000X) that should be compatible with Harpertown but only certain models were after the Bios update was applied. I'm not sure if these models had any differences in motherboard design that prohibited the user of Harpertown CPUs or if Dell simply wanted to not enable initialization of the CPUs in their Bios in order to get customers to upgrade to new systems.

It would be nice if we had somebody that definitively tried a 10676/SLAxx stepping Harpertown CPU in a 1,1/2,1. Again I assume it failed because if it were successful straight up, I think we would know that by now. However testing on a 10676/SLAxx stepping might eliminate more unnecessary variables than trying to deal with a stepping that has never been used on any Mac before.

I'll be watching this thread in case anything changes. I have a 1,1 that I flashed to 2,1 running dual 5355s. It's a shame it's the end of the line for this machine due to lack of SSE 4.1 instruction set.

 

[Inspector42]

I am afraid just plugging in a different CPU will have no hope of success.
Besides the difference in hardware I pointed out earlier in this thread, getting the Mac to post is just the first small step.

Since Mavericks OS X requires a 64Bit EFI to boot and we are lucky that people like @tiamo and @pike-r-alpha provided a modified bootloader that thunked the 64Bit EFI calls from the OS X to the 32Bit EFI in the BootROM of the Mac Pro 1,1 (see this threads: Mavericks, Yosemite and El Capitan). I would also like to highlight @rthpjm´s installer script pikify.
There is even an early version of that boot loader for Sierra on GitHub, but with the lack of SSE4.1 support by the XEON 53xx it was never brought to life.
There is a little bit of discussion of options at the end of this thread for starters.
Mojave then introduced another limitation. Graphic drivers for AMD-GPUs require SSE4.2, which disqualifies the Harpertown CPU once more unless you are running a Metal compatible NVIDIA graphic card.

In my mind we have to options to succeed in running Sierra, High Sierra or even Mojave on an MacPro1,1/2,1 (besides any needed hardware modifications):

1. Supporting XEON 54xx: Back porting the MacPro 3,1 EFI to the MacPro1,1/2,1. It will overcome the 32Bit limitations and may come with some other nice improvements. However it will have to be adopted to the MacPro1,1 hardware and considering that circuit diagrams or even core information on chips used are hard to come by, it will require some heavy duty reverse engineering on the hardware and quite some mature skills in EFI programming. An additional complication is that additional code may be needed to re-enable the use of the XEON 5300/5100 to be more flexible in testing.
   I don´t know, if there might be a size limitation of the BootROM of the MacPro1,1/2,1 getting in the way.
2. Staying with XEON 53xx/51xx: Finalizing pike-R-alpha´s boot loader and create a kext to emulate the SSE4.x instruction set using this library provided by Intel for developers. There are people who ran it under Windows to enable their Games to run with SSE4.x support. That of course will come with a burden to performance. If anyone is interested in details about SSE4, you can find it here. Again that requires some heavy engineering work and a tightly connected community for testing.

I used to do similar stuff when we were still using 8-Bit CPUs and even then more simpler challenges could easily suck up weeks of continuous work.
I would be delighted if some bright mind would point out other options that are less involved.