Did you end up trying the E5240 in your MP1,1? I still have my MP1,1 flashed to 2,1 running dual 5355s and I'd love to be able to get it running an OS newer than el Cap.
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Updating a Mac (Pro)s CPU Microcode
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Did you end up trying the E5240 in your MP1,1? I still have my MP1,1 flashed to 2,1 running dual 5355s and I'd love to be able to get it running an OS newer than el Cap.
nah still need to get round to testing that
(knew I was forgetting about something when I had my MP1,1 out a couple weeks ago LOL)
Not sure on where to put this so it seems like here is just as good a place as any ...
So I spent a little time today attempting to update the Xserve3,1 firmware to mp5,1 using the 09-10 update tool (Modified to accept the xs3,1) in hopes that if I could flash it via that method that we could keep serial and cloud info ... basically have a more valid rom in the end vs what I’ve heard using rom tool to flash the 5,1 rom causes you to lose the serial number and some other things.
my initial run was using opencore to fake it as a 4,1 which allowed the app to work and selecting “EFI” as the boot entry the EFI flasher did appear to start up but failed.
i was able to change the checks in the app to get the app to not force quit looking for a Mac Pro and got the Xserve into bootrom update mode (using the flashed MXM WX4150) and the EFI update progress bar comes up for about a second and instantly fills and reboots. I tried again using the stock MXM Gt 120 just in case that was a factor. no change.
...
Figured it out
Did a "native" update using the tool which retained useful things.
forums.macrumors.com
So I spent a little time today attempting to update the Xserve3,1 firmware to mp5,1 using the 09-10 update tool (Modified to accept the xs3,1) in hopes that if I could flash it via that method that we could keep serial and cloud info ... basically have a more valid rom in the end vs what I’ve heard using rom tool to flash the 5,1 rom causes you to lose the serial number and some other things.
my initial run was using opencore to fake it as a 4,1 which allowed the app to work and selecting “EFI” as the boot entry the EFI flasher did appear to start up but failed.
i was able to change the checks in the app to get the app to not force quit looking for a Mac Pro and got the Xserve into bootrom update mode (using the flashed MXM WX4150) and the EFI update progress bar comes up for about a second and instantly fills and reboots. I tried again using the stock MXM Gt 120 just in case that was a factor. no change.
...
Figured it out
Did a "native" update using the tool which retained useful things.
Xserve 2020 [Xs3,1]
I modified the 2009-2010 Mac Pro update tool to do a 'native' upgrade of the firmware (instead of brute force with ROMTool). This has put me on the MP51.007F.B03 firmware on the Xserve 3,1. This retained my serial number from the Xserve but it does not say "xserve" but says Mac Pro in about...
forums.macrumors.com
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I wrote a long post about flashing a 2007 iMac 7,1 with 2008 iMac 8,1 firmware. See here:
It may be that one also needs to flash the SMC firmware to make this work. I understand it is now possible to extract the SMC code from a Mac and flash it to another Mac or SMC chip. All one would need is a iMac 8,1!
@Ludacrisvp, how about adopting the Mac Pro 2009-2010 update tool to switch between iMac 7,1 and 8,1?
On the other topic: I need to finally write about the LPC connectors on the Mac Pro 1,1 and 3,1 and how they are used to program the flash memory chip.
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While you can read the SMC keys, the Renesas H8S/2100 used on several Mac Pros* as the SMC is not even dump-able. Take a look at the data sheet, the H8S don't even have a way to read the firmware, you can write anything to it, but you can't read the firmware from the internal flash memory.
Edit: *Added the SMC model on the Mac Pros I have access here now:
| Mac Pro | H8S model: | H8S Package: |
| MP3,1 | F2116BG20V H8S/2116V | BGA |
| MP4,1 | F2117TE20H H8S/2117V | TQFP |
| MP5,1 | F2117TE20H H8S/2117V | TQFP |
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I am starting to think all this is irrelavent with the New ARM PPC MACS on steroids.. No, its not apple silicon to me which is just stupid.. Call it ARM PPC or V2 ARM PPC.
so the L5410 Harpertown CPU arrived today
sadly the ebay seller Messed up and sent me 1 E0 stepping L5410 rather then the 2 C0 stepping CPUs that where actually ordered...
I still pressed on with trying to get it to work in my Mac Pro 1,1/2,1 (only thing is E0 throws another variable into the system considering E0 supposedly does not even work in 3,1s let alone 1,1/2,1s)
now im going to mention a couple of things before getting to actually fitting the L5410 and that is:
I noticed that with both the Xserve1,1 and my MacPro2,1, they both lack G0 Woodcrest/Clovertown Microcode yet both of them will happily boot with G0 stepping CPUs they just run with no microcode. (Stepping 11 is G0)
View attachment 758496
now the interesting thing is if I add G0 microcode to the EFI on both the Xserve1,1 and the Mac Pro1,1 they will both fail to POST and light up the CPU_HLT/CPU FAIL LEDs on their respective motherboards... if I remove the microcode it boots right up.
now onto the L5410 and Harpertown CPUs.
first test was Just installing the CPU into a unmodified Mac Pro 1,1-2,1.
interestingly I had read reports that this would result in the CPU over temp LED lighting up and thats it.
but what happened is the Machine turned on it did not POST or chime but no LEDs that should not be normally lit up where lit(the Over temp and CPU FAIL LEDs stayed off).
having confirmed that the Mac Pro as more or less expected does not work with the Harpertown CPU stock, I went about adding the E0 Harpertown Microcode (CPUID 1067A) into the Mac Pros EFI.
I then flashed it and rebooted with the X5355s to make sure I had not bricked anything Once I confirmed that I had not bricked anything I stuck the L5410 in...
moment of truth time. apply power stuff spins up ... ... CPU_FAIL LED lights up. f*ck... but interestingly this is diffrent from what the L5410s in the Mac Pro 1,1/2,1 did when there was no microcode for them in the EFI.
what im suspecting is happening is, since we deduced that the Mac Pro 2,1 will run/post with a CPU That has No microcode in the EFI. (another example of this is the iMac7,1 does not have any penryn Microcode but will work with Penryn CPUs)
I think that the Harpertown is actually trying to boot when in a stock Mac Pro 1,1/2,1 there just seems to be some sort of Hardware incompatibility stopping it from finishing POST but it does get far enough to Load Microcode if I have inserted it and fall over said microcode like the G0 CPUs do.
now the interesting thing is I vaguely remember reading a Mac Pro article where it mentioned that some people with the Intel V8 Motherboard (The Pre curser to SkullTrail) managed to hack in Harpertown Support via some Hardware mods.
sadly I cant find this article for love nor money, I would love to find out some more details on the mods they did to see if they can be Applied to the Mac Pro 1,1/2,1
it also brings back us back to what anadtech said here https://www.anandtech.com/show/2800/upgrading-and-analyzing-apple-s-nehalem-mac-pro
View attachment 758504
im really curious as to what those Hardware mods are (like the intel V8 board?) sadly anand works for Apple now IIRC, so I dont know if we could even contact him for details...
im also quite curious as to what a Genuine Mac Pro 2,1 Would do with harpertown CPUs since I know the Mac Pro 2,1s logic-board is slightly diffrent from the Mac Pro 1,1 Logic-board (thanks to @Surrat s detailed analysis of a real 2,1 Lobo) Remember that I (and a lot of other people) use 1,1 boards that are flashed to 2,1 Firmware, I also still need to Test out C0 CPUs in the 1,1/2,1 but at least I have an E0 Harpertown now for testing E0 Harpertowns in a Mac Pro 3,1 if i can get ahold of a MP3,1...
I hope this all makes sense! I may or may not have been awake for over 24 hours at the time of writing this up
basically TLDR is:
Harpertowns in 1,1/2,1 are still a no go but I think its just a hardware limitation we might be able to hack round.
Necroing the thread to suggest trying a BSEL mod on the cpu to change the fsb speed.
cant see how that would help, im not using any 1600Mhz FSB CPUs here, im using 1333Mhz FSB CPUs here
only way I can see it helping if theres some weird signal integrity thing which means only 1066Mhz FSB Penryn based CPUs work? LOL
I´m looking at the HW side of how to get SSE4.x capable Xeons to work in MP2,1 (or up-modded 1,1).
Set up an easy-access "eval board" also, with a dual Boot-Flash selector switch that makes it easy to dare to flash non-sense configurations like a 3,1 flash content to a 2,1 machine - I do not have to de-solder the flash to revive the machine to a working "bank" of the boot flash... ;-)
Still: No luck. Even with modifications to the processors (taped select pins as insulation) and suitable µcodes I can only get as far as a non-boot (with various indications on the status LEDs and even on the RAM bank LEDs).
I just wish the SMC (H8) was as easy to double as the flash... but hey, me might have a debugger left over from some recent project - it might be usable as it was for a H8/300 system... close enough to the H8/2116?! We´ll see...
More to come, as we do not give up so easily! ;-)
edit:
I´ve attached another PDF where I extracted and noted all pinout differences between 53xx and 54xx Xeons.
Interestingly, signal TESTHI12 which is not available on 53xx but needed on 54xx is already routed correctly by Apple on the MB1,1(2,1) mainboard. Other -reserved- pins on the 54xx can be tape-insulated on the processor locally.
Still, we seem to have missed a detail...
Set up an easy-access "eval board" also, with a dual Boot-Flash selector switch that makes it easy to dare to flash non-sense configurations like a 3,1 flash content to a 2,1 machine - I do not have to de-solder the flash to revive the machine to a working "bank" of the boot flash... ;-)
Still: No luck. Even with modifications to the processors (taped select pins as insulation) and suitable µcodes I can only get as far as a non-boot (with various indications on the status LEDs and even on the RAM bank LEDs).
I just wish the SMC (H8) was as easy to double as the flash... but hey, me might have a debugger left over from some recent project - it might be usable as it was for a H8/300 system... close enough to the H8/2116?! We´ll see...
More to come, as we do not give up so easily! ;-)
edit:
I´ve attached another PDF where I extracted and noted all pinout differences between 53xx and 54xx Xeons.
Interestingly, signal TESTHI12 which is not available on 53xx but needed on 54xx is already routed correctly by Apple on the MB1,1(2,1) mainboard. Other -reserved- pins on the 54xx can be tape-insulated on the processor locally.
Still, we seem to have missed a detail...
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Additional infos:
We tried to tape off the BSEL2 pin to change FSB, but that did not help either (and it would not have made any sense anyway).
Processors tested so far: E5450 and X5450 with 10676 and 1067A µcode sets. Just to make sure it´s not related to this specific type, E5440 have been ordered on ´bay, so will test them as well.
With the handy dual bank of boot flash, we also risked the experiment of using a MP3,1 firmware on the MP2,1.
Does not boot (as expected), but on the RAM banks, both slot-1 error LEDs come and stay lit.
Interesting find here: This also happens with the 800MHz RAMs from the MP3,1 and as a side note, the MP3,1 RAM riser slots do not only fit into the mainboard slots, but actually really work in the MP2,1 when used with 53xx or 51xx processors. Might come handy at some point (even though the PCBs are a couple of mm smaller and will not directly get a grip in the mech. bay when housing components are assembled).
We tried to tape off the BSEL2 pin to change FSB, but that did not help either (and it would not have made any sense anyway).
Processors tested so far: E5450 and X5450 with 10676 and 1067A µcode sets. Just to make sure it´s not related to this specific type, E5440 have been ordered on ´bay, so will test them as well.
With the handy dual bank of boot flash, we also risked the experiment of using a MP3,1 firmware on the MP2,1.
Does not boot (as expected), but on the RAM banks, both slot-1 error LEDs come and stay lit.
Interesting find here: This also happens with the 800MHz RAMs from the MP3,1 and as a side note, the MP3,1 RAM riser slots do not only fit into the mainboard slots, but actually really work in the MP2,1 when used with 53xx or 51xx processors. Might come handy at some point (even though the PCBs are a couple of mm smaller and will not directly get a grip in the mech. bay when housing components are assembled).
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1000% support this mod
[doublepost=1523320364][/doublepost]Or can we OC the CPU by modding the firmware?
Perhaps it's a stupid question but, Why using a dual Core 4.4 is better than hexa Core 3.46?
awesome stuff
thanks for testing a 3,1 BR on a 1,1/2,1 was one of those silly curious things I wondered about, but did/do not have any machines I want to risk bricking
and good to know the 3,1 RAM risers work with a 1,1/2,1 too, I wonder if the opposite is true? (ie 1,1/2,1 riser in a 3,1 logic board)
and yeah I found on my 1,1/2,1 that 3,1 RAM would not work with it either, 1 stick on its own would, be anymore would not, go figure!
Many software (more than 90%) still CPU single thread limiting. Even the GPU driver is CPU single thread limiting.
With dual processor tray, we can have dual X5698, which has 4C 8T @4.4GHz. That's better for absolutely most softwares. Of course, for something like handbrake, a single hex core 3.46 can do better. But for someone like me, 4C @4.4GHz works better than 6C @3.46GHz most of the time. And that's about 25% improvement for more than 90% of work.
Another reason I support this project is because we can have more choices. It's the owner to choose which config is better.
At this point I think that we have to dive deeper into i.e. disassembling the X86-64 parts of the bootflash and even the SMC firmware, to see what exactly is inhibiting a proper startup.awesome stuff
thanks for testing a 3,1 BR on a 1,1/2,1 was one of those silly curious things I wondered about, but did/do not have any machines I want to risk bricking
and good to know the 3,1 RAM risers work with a 1,1/2,1 too, I wonder if the opposite is true? (ie 1,1/2,1 riser in a 3,1 logic board)
and yeah I found on my 1,1/2,1 that 3,1 RAM would not work with it either, 1 stick on its own would, be anymore would not, go figure!
As for the 800MHz RAM in a 2,1: I have successfully used various mixes of 667 and 800MHz sticks on my 2,1 machines.
I still think it may be hardware, because and I really wish I could find the exact article but i cant, but I recall that the hardware they (being some enthusiasts) modified on the intel V8 motherboard to get it working with harper towns was to do with either the PLL/clock gen stuff or the voltage regulator it may have been both even but I cant quite recall
I do know the Clover town and harper town CPUs do have different voltage regulator specs so that may be worth looking into
Yes, you´re right, the V8 article on the intel board mod would really help...
As would the schematics of MP2,1 or 3,1 do. I´ve searched for years now to get them, even contacted those dubious sources that sell "board viewers" plus schematics on ebay, but none could help.
Also the FSB voltage differs on 0,1V between the Xeons of series 54xx (1,1V) and 53xx (1,2V). That imho should not inhibit booting altogether but would perhaps lead to instabilities or rapid ageing of the 54xx (when supplied with 1,2V instead of 1,1V). But together with the core voltage it´s a thing to check, for sure.
Great explanation h9826790. It makes sense.. But then why this "multicores madness" specially at that time (before 2012) when surely even less programs would use multicore?
Several types of professional and scientific apps scale fairly perfectly with more cores, to cite some massive parallel applications:
- video conversion/compression
- video renderization
- video editing (less so, but usually this involves render/conversion/compression)
- software compiling
- some databases/modelling data
- ML
- several scientific applications
IMO, many people have no idea what they really need, and even what they are actually buying for. Apple (or other computer company) only care if customers willing to pay more, but not really care if you buy the correct machine.
People still often look at the wrong parameter when they buy some hardware. e.g. looking for a SSD to improve system responsiveness, but only care the sequential speed, not the IOPS.
Or some people looking for the most powerful GPU for Photoshop, but have no idea that almost no function in Photoshop use GPU compute (by that time).
If you read the benchmarking post, you can even see people upgraded the GPU, but then benchmarking the CPU, and complain no improvement.
These are all the signs that some people have no idea what they are doing / buying.
Also, back in 2012, the software support for GPU HWAccel wasn’t mature yet. CPU core count really matters for video work (many users buy cMP for media creation work). But nowadays, a single Radeon VII can easily encode few times faster than dual X5690. GPU compute also more popular now. Which actually makes CPU core count less important than back in 2012 (if the user can utilise the GPU for the same purpose).
Yeah, that’s why I said about 90% software, but not all. And I use Handbrake as example that more cores can work better.
However, professional apps (including video related software) still just a small part of the software world.
I fully understand that many Mac Pro users CAN utilise all CPU cores. What I want to say is that SOME of them actually focus on the wrong area. And this was even a bigger problem back in 2012. E.g. many cMP users go for the lowest speed dual processor cMP for Photoshop, but they don’t know that a faster single processor cMP can do better, but cost less.
Dual core X5698 surely not the best option for everyone. Especially on a single processor cMP, because the OS itself allow for multitasking. Just the OS’s background task may fully occupy both cores sometimes. But IMO, still better to have this option. Especially dual X5698 can be a good config for those who don’t quite need high core count computer.
But of course, this only worth to do if the the cost and risk are relatively low. Otherwise buy a newer computer will make much more sense.
Most Intel Macs have their bootROM firmware in a 8-pin SPI rom. They are easy to reprogram on the board with a CH341A-type programmer and a test clip. All that is needed is connecting four wires. The exception is the Mac Pro 1,1 and 3,1. The bootROM is in a 40-pin M50FW016 flash memory chip in a TSOP-40 package. The chips are programmed at the factory using a parallel interface similar to that of flash memory chips used in SSDs. In the Mac the the bootROM is read trough 4-bits wide low pin count LPC bus.
It is possible to read and write the bootROM through the 30-pin "LPC" connector. As we do not have the schematic diagram for the Mac Pro we do not know the pinout of the connector, but similar 30-pin connectors exist on all Intel Macs until 2015. On the diagrams this connector is marked "LPC+" with numbers J6000, J6100 and J5100.
Adapters and flashing cables for J6100 and J5100 connectors are widely available on the internet, be it at exorbitant prices. Their use seems to be mainly illicit, in changing serial numbers and unlocking iCloud locks and EFI passwords in stolen Macbooks.
One more respectable company that makes the adapters is CMIzapper from the Netherlands. Here is their set of adapters from the Chipmunk Easy Flash Set.
From left to right: 12-pin Hirose, 30-pin Molex, 30-pin Hirose.
Here is another set of connectors from China.
Despite the different connector types used the 30-pin connectors all seem to share the same pinout. Here is a typical example from a 2007 17-inch Macbook Pro.
Here is another example from the same era.
The connector types used are QT500306-L021-9F by Foxconn and the 5047 series by Kyocera. Both use a 0.5 mm pitch. The Mac Pro connector seems to be the one by Kyocera. The difference is that the Foxconn connector on the logic board is a male "plug" while the Kyocera connector is a female "receptacle". Evidently this was done to prevent anyone from plugging the wrong probe into the logic board. The newer Molex and Hirose connectors use a 0.4 mm pitch.
The exact part number for the plug needed to connect to the Mac Pro LPC connector is 145047030950829+. The part is available from Digikey in the US and from Mouser in Europe. The price from Mouser is 1,02 € in quantities of one. (I do not know what the minimum order from Mouser is.)
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no, you can't do that with the 4.1/5.1, because the circuitry of apple
doesn't allow you to access it without powering the backplane.
you could supply the SPI with the necessary voltage, but
a desoldering and re-soldering would be the easier option here.
also it wouldn't hurt to replace the old component with a new one when you have the opportunity.
First thing I´ll check tomorrow.
btw, the 5440 pair arrived yesterday ;-)
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The microcodes never seem to be enough. What is needed is the Intel® Firmware Support Package that does the processor and memory initialization. Intel delivers these in as a binary blob. If you can no longer download the blob from Intel's site, it should be possible to transplant the blob from from one firmware file to another, as long as the chipset and memory configuration are the same.
I spent half a day searching for information on the Intel V8 motherboards. These are Intel Servers Boards based on the 5000 / 5000X northbridge. I do not think the Intel Server Boards need a hardware modification to run Harpertown CPUs. The modification is in the firmware update. (I should write a long post on why I think so.) The "refresh letter" from Intel from July 12, 2007 is just marketing material. It ensures the customers that motherboards with the extra "R" in their product codes have firmware that can run Harpertowns.
I have managed to find the firmware update for the Intel S5000 series servers boards. (Intel must have removed the file from their site since I first posted about this.) The latest BIOS version for the boards is R0098 from November 30, 2010. Only version R0096 from January 13, 2009 can be found anywhere on the web. The file name is SLSRPv18.zip and it can be found from the bottom of this French page. It may also be available here. This firmware version supports 5400-series Xeons, including stepping E0. All the S5000 server board use the same firmware.
I believe that:
- The Mac Pro 1,1 would boot or at least post if flashed with the Intel firmware.
- It would also boot with 5400-series Harpertown processors.
You should also try Coreboot version 4.7 for the Supermicro X7DB8 motherboard. (Support for the board was dropped in June 2018 with the release of Coreboot 4.8.)
Update: I have changed my mind. I have finally found the document where Intel says that a specific Printed board assembly (PBA) Revision is a requirement for using 5400-series Xeon processors. But we still need to try the Intel firmware. If the Mac Pro posts with Intel firmware and Clovertowns but does not post with Harpertowns, then we know the issue is with hardware. We can then move on to debugging the hardware issue.
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I vaguely remember reading a Mac Pro article where it mentioned that some people with the Intel V8 Motherboard (The Pre curser to SkullTrail) managed to hack in Harpertown Support via some Hardware mods.
sadly I cant find this article for love nor money, I would love to find out some more details on the mods they did to see if they can be Applied to the Mac Pro 1,1/2,1
Intel says the early V8 / S5000XVN motherboards need a hardware revision to support Harpertowns. I have searched the Internet far and wide and have not found even a hint as to what the modifications are. The closest to the secret wisdom may be this exchange from ten years ago by two of the most knowledgable people, Anand Lal Shimpi and Rominator / MacVidCards.
Does Anandtech know something that we don't?
From the story about upgrading Nehalem, I noticed this little tidbit.
Anyone know what he is talking about?
"While you could stick Clovertown into the first generation Mac Pros, you couldnt upgrade them to Harpertown without hardware modifications to the system (don't ask me what they are
I doubt Anand actually knows anything, and even if he does he will not be telling us.
One possible issue might be the chipset. Do all revisions of 5000X support Harpertowns. Intel is not telling us anything. The only version of the 5000X datasheet is from September 2006, from a time long before Harpertowns were introduced.
A hint comes from this discussion on the Dell support forum.
Another example is the Asus DSBV-D serverboard with the same Intel 5000V chipset: "Fully-Buffered DIMM up to up to 16GB (B3 Stepping) or 24GB (G1 Stepping) Memory Space".
Page 75 of the Intel datasheet discusses hardware revisions. They are defined by seven bits in a register; 000 is stepping A, 001 is stepping B, 010 is stepping C. (Would 110 be stepping G?)
The command lspci in Linux produces a listing of all the components on the PCIe bus, along with revision numbers. Searching for the first line "Host bridge: Intel Corporation 5000X Chipset Memory Controller Hub (rev" produces a listing of all the stepping in use. By adding "Mac Pro" to the search query I found two cases of Mac Pro 2,1 with stepping 31. One Mac Pro 1,1 had a stepping 30.
Looking for revision number and processor combinations I found a Dell Poweredge 2900 with a Xeon X5460 CPU and revision 12 of the 5000X northbridge . Evidently revision 12 is older than revision 30.
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I got hold of the files on the french server, but after looking into the 1.7MB binary with a hex editor I doubt that would work when flashed directly/unmodified to the MP2,1 flash. In addition, the µcodes seem to be missing also - or at least the microcode tool from @dosdude1 cannot find any in there...
Will try it nonetheless, nothing to lose due to my fallback flash bank.
As in any good riddle, the number of open questions first rises faster than solved issues:
When I delete the suitable µcodes from i.e. a MP2,1 that were contained for i.e. an E5150 or E5160 processor, or even when I delete all microcodes, and flash that back, the machine still boots! @LightBulbFun reported a similar a couple of weeks ago when experimenting with adding/removing µcode tables.
What could be an explanation? Some backup copy of the last known-good µcode table in the Northbridge (4-8k is not so much to store anywhere)?
Additionally:
Does anyone know if the intel ME is located in the 5000 controller (Northbridge) and what kind of embedded controller intel used there? Or does it come along contained in the Xeons?
Will try it nonetheless, nothing to lose due to my fallback flash bank.
As in any good riddle, the number of open questions first rises faster than solved issues:
When I delete the suitable µcodes from i.e. a MP2,1 that were contained for i.e. an E5150 or E5160 processor, or even when I delete all microcodes, and flash that back, the machine still boots! @LightBulbFun reported a similar a couple of weeks ago when experimenting with adding/removing µcode tables.
What could be an explanation? Some backup copy of the last known-good µcode table in the Northbridge (4-8k is not so much to store anywhere)?
Additionally:
Does anyone know if the intel ME is located in the 5000 controller (Northbridge) and what kind of embedded controller intel used there? Or does it come along contained in the Xeons?