EminenceGrise said:
Because the G5 does not support the 'pseudo-little-endian' mode that the G3 and G4 chips did. PPC chips are 'big-endian', while x86 chips are 'little-endian'.
Almost.
The PPC architecture allows for chips to be built to either "endian". Until the G5, all chips in the series could go either way, and could be switched on the fly. This is what VPC did.
IBM removed the little-endian capabilities from the PPC 970. They probably thought nobody would care, since the little-endian PPC operating systems (like Windows NT/PPC and OS/2 PPC) never really went anywhere and are little more than historic footnotes today. As far as I know, VPC is the only software product that ever used it.
EminenceGrise said:
Endian'ness' refers to which way the binary numbers are formatted with respect to the inner workings of the CPU (whether the first bit in a number is the 'most significant' bit or 'least significant' bit). It would be analagous to the difference between writing the number one-thousand left to right as "1000" or right to left as "0001".
Technically correct, but the order of bits within a byte, while significant for someone designing a processor or designing support chips to interface to a processor, is almost never of importance to software.
Most of the time, the term refers to the order of bytes that comprise multi-byte numbers (most commonly 16-, 32- and 64-bit integers, and 4- and 8-byte floats.)
For instance, the 64-bit hexadecimal number 0x123456789ABCDEF0 stored at address zero on a big-endian machine would have the following values in memory:
0:0x12 1:0x34 2:0x56 3:0x78
4:0x9A 5:0xBC 6:0xDE 7:0xF0
On a little-endian machine, the same number at the same location would have the following values in memory:
0:0xF0 1:0xDE 2:0xBC 3:0x9A
4:0x78 5:0x56 6:0x34 7:0x12
There are other byte orderings than these two, but you aren't likely to find them used in modern processors.
There are technical advantages and disadvantages to both representations and arguing which is "better" usually results in a religious flame-war. The big deal is that it's far easier to emulate a chip when your own processor supports the same byte ordering. When IBM removed little-endian capability from the PowerPC, it forced Connectix (and later Microsoft) to make a very substantial change to VPC in order to remain compatible.
EminenceGrise said:
The pseudo little endian mode of the G3 and G4 allowed you to tell the CPU "this is a little endian number" and the CPU would do whatever conversions necessary to work with it,
I know that these mixed-mode instructions exist, but I thought VPC actually switches the CPU in and out of little-endian mode to do the x86 emulation.
EminenceGrise said:
making it a bit easier to work with binary x86 code - the PPC CPU could do some of the emulation work that would otherwise have to be done in software. The G5 doesn't have this mode, so MS had to go through all of the VPC code and remove any dependencies on it (for the G5 at least), come up with a software method of implementing the same function, and then test it to make sure it worked. Not an entirely trivial task.
About this, we're in complete agreement.
