What is the likely RAM upgrade path for Apple Silicon?

[BenRacicot]

I’m wondering when we’ll see a new RAM type on Apple Silicon.

Wikipedia says it’s currently 6,400 MT/s LPDDR5 SDRAM

But what are the most likely future RAM types for M-4, M-5, Extreme, etc. SoCs?

 

[Basic75]

You're mixing up something, Samsung just announced GDDR7, that's for GPUs (and game consoles). And I believe that DDR6 won't be out for at least another year.

 

[BenRacicot]

You're mixing up something, Samsung just announced GDDR7, that's for GPUs (and game consoles). And I believe that DDR6 won't be out for at least another year.

Hey! I’m not mixing it up or comparing it in anyway. But I’ll remove that ref.

Did you have any insight on the future of M-series RAM types?

 

[Pressure]

The next iteration of LPDDR.

For example you can get LPDDR5X at speeds up to 8533 Mbps right now.

However we are not currently limited by memory bandwidth, so it is entirely academic.

 

[BenRacicot]

The next iteration of LPDDR.

For example you can get LPDDR5X at speeds up to 8533 Mbps right now.

However we are not currently limited by memory bandwidth, so it is entirely academic.

That’s what I thought too. Can you elaborate on that it isn’t currently bottlenecked by memory bandwidth? And when would the SoC become bottlenecked by LPDDR and then LPDDR5X?

 

[throAU]

I would not be shocked to see apple use some future version of HBM as a cache for larger pools of memory on some SOC in the future (maybe some future Mac Pro).

 

[leman]

Not much comes to mind to be honest. LPDDR6 is still far from mass availability, so what's left? Apple could increase the number of memory channels (which will be expensive for them) for an obvious performance boost. What's interesting is that the Vision Pro googles allegedly use some custom low-latency DDR RAM variant, so maybe Apple intends to go full custom RAM at some point? Again though, very very expensive.

 

[Pressure]

That’s what I thought too. Can you elaborate on that it isn’t currently bottlenecked by memory bandwidth? And when would the SoC become bottlenecked by LPDDR and then LPDDR5X?

Sure, the CPU blocks can't saturate the current available memory bandwidth alone, you can read more here at AnandTech. Other modern CPUs like the Intel i9-13900K maxes out at 89.6GB/s and the AMD Ryzen 7 7950X at less. The bottleneck is going to be in other parts of the SoC as it stands right now (size of caches probably), even when using both CPU and GPU combined.

SoC	Memory bandwidth
M1	68 GB/s
M2	100 GB/s
M1 Pro / M2 Pro	200 GB/s
M1 Max / M2 Max	400 GB/s
M1 Ultra / M2 Ultra	800 GB/s

Using faster memory like LPDDR5X will give you are nice ~36% increase in memory bandwidth across the range if needed for the M3 series but they will likely wait a generation further seeing as how we aren't close to be memory bandwidth constrained.

 

[leman]

However we are not currently limited by memory bandwidth, so it is entirely academic.

How can you be so certain? Apple's GPUs have lower memory bandwidth than some other GPUs with the same compute capability. They are very likely to be bandwidth-limited on certain workloads.

Sure, the CPU blocks can't saturate the current available memory bandwidth alone, you can read more here at AnandTech.

The CPU is limited by the L2 cache throughput (which appears to 32 bytes per cycle). So saying that the CPU isn't bandwidth limited is a little bit of a chicken and an egg problem. Apple's caches are fairly slow (probably to reduce power consumption), and everything else is designed around it. The reason why Apple CPU can tap into more DRAM bandwidth than x86 CPU cores is simply because it is hooked to the same SLC/memory controller system that also feeds the GPU. At the same time, x86 CPU caches are easily 2x-3x faster than Apples.

 

[Pressure]

How can you be so certain? Apple's GPUs have lower memory bandwidth than some other GPUs with the same compute capability. They are very likely to be bandwidth-limited on certain workloads.



The CPU is limited by the L2 cache throughput (which appears to 32 bytes per cycle). So saying that the CPU isn't bandwidth limited is a little bit of a chicken and an egg problem. Apple's caches are fairly slow (probably to reduce power consumption), and everything else is designed around it. The reason why Apple CPU can tap into more DRAM bandwidth than x86 CPU cores is simply because it is hooked to the same SLC/memory controller system that also feeds the GPU. At the same time, x86 CPU caches are easily 2x-3x faster than Apples.

I think we both agree that the limitations is currently elsewhere in the design and I will admit that the memory bandwidth can be a compromise due to them 😅

 

[Basic75]

At the same time, x86 CPU caches are easily 2x-3x faster than Apples.

"Faster" in terms of CPU clock cycles, or nanoseconds, per access? On the flip side Apple's L1 caches are much larger than in the x86 world.

 

[leman]

"Faster" in terms of CPU clock cycles, or nanoseconds, per access? On the flip side Apple's L1 caches are much larger than in the x86 world.

Faster in terms of bandwidth (bytes transferred per cycle) If I remember correctly Apple's L1 can do 48 bytes per cycle. Compare this to two 512-bit loads Alder Lake can do! And then take into account the much higher clock on x86 processors...

 

[Basic75]

Faster in terms of bandwidth (bytes transferred per cycle) If I remember correctly Apple's L1 can do 48 bytes per cycle. Compare this to two 512-bit loads Alder Lake can do! And then take into account the much higher clock on x86 processors...

Quite impressive. Might be for AVX512 or to make up for having fewer registers.

 

[Yebubbleman]

It's DDR4-based on the base M1 and DDR5-based on the M1 Pro, M1 Max, M1 Ultra, and the entire M2 family. My guess is that we'll be on that for a while, seeing as the rest of the industry is still in the process of moving to DDR5.

 

[leman]

It's DDR4-based on the base M1 and DDR5-based on the M1 Pro, M1 Max, M1 Ultra, and the entire M2 family. My guess is that we'll be on that for a while, seeing as the rest of the industry is still in the process of moving to DDR5.

Apple uses LPDDR. It’s very different from DDR standards.

 

[Yebubbleman]

Apple uses LPDDR. It’s very different from DDR standards.

Relative to what the OP was talking about, this is a minor and largely irrelevant technicality. Yes, LPDDR and DDR are different, but DDR4 and LPDDR4 are related, just as DDR3 and LPDDR3 are. If those nuances were important, I'd have stressed that the Pro and Max SoCs don't use LPDDR, but rather DDR. But, that's still getting more into the weeds than was asked.

 

[leman]

Relative to what the OP was talking about, this is a minor and largely irrelevant technicality. Yes, LPDDR and DDR are different, but DDR4 and LPDDR4 are related, just as DDR3 and LPDDR3 are.

I don’t see this as an irrelevant technicality given that these standards are developed at different rates. They are of course related, to a certain degree, as they are both DDR and developed by the same organization, but thats pretty much where the relation ends.

Technicalities aside, the most important difference for this discussion are the roadmaps. LPDDR6 is supposed to hit the markets as early as next year, DDR6 won’t arrive before 2026. Also LPDDR6 is going to be 40% faster than DDR6.

If those nuances were important, I'd have stressed that the Pro and Max SoCs don't use LPDDR, but rather DDR.

They use LPDDR5 as well. None of Apple Silicon Macs use DDR5.

 

[Basic75]

Also LPDDR6 is going to be 40% than DDR6.

40% what?

 

[leman]

40% what?

40% everything you desire

(was supposed to be 'faster', fixed it now. thanks!)

 

[Boil]

Tim Cook is probably trying to hammer out a deal right now...

Vendor - "How much LPDDR5X did you want...?"

Tim Cook - "Yes..."

 

[bobcomer]

LPDDR6 is supposed to hit the markets as early as next year, DDR6 won’t arrive before 2026. Also LPDDR6 is going to be 40% faster than DDR6.

So why would anyone use DDR6? (higher RAM capacities?)

 

[leman]

So why would anyone use DDR6? (higher RAM capacities?)

- cost and availability (LPDDR is much more expensive)
- modularity (LPDDR is not designed to be replaced or upgraded)
- density (DDR generally supports much higher RAM capacity)

 

[bobcomer]

- cost and availability (LPDDR is much more expensive)
- modularity (LPDDR is not designed to be replaced or upgraded)
- density (DDR generally supports much higher RAM capacity)

Thanks!

 

[Yebubbleman]

They use LPDDR5 as well. None of Apple Silicon Macs use DDR5.

Huh. Could've sworn I saw differently in MacTracker, but now that I look at it, I don't.

 

[BenRacicot]

Wow thank you all for such insights, you've all mentioned so much I didn't know.
Especially @leman "LPDDR6 [2026] is going to be 40% faster". This is interesting for Macs.

So it looks like the only paths mentioned are

1. LPDDR5 (current)
2. LPDDR5X (next?)(M4/M5?)
3. LPDDR6 (far future?)
4. HBM appears to be out of the running when compared to LPDDR5X.