They could also increase the memory bus, or implement some custom solution… but the next industry-standard step is indeed LPDDR5X, with 30% higher bandwidth
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What is the likely RAM upgrade path for Apple Silicon?
- Thread starter BenRacicot
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I wouldn't say HBM is entirely out of the picture for a future pro machine - if apple decide to be in that market at that level.
HBM was good for 1TB/sec memory bandwidth in shipping product like 4-5 years ago (multiple packages), so as a high speed cache for larger memory pools it may be viable (newer HBM standards are faster). But Apple probably aren't going to bother going down that path due to complexity.
It would be interesting though.
HBM was good for 1TB/sec memory bandwidth in shipping product like 4-5 years ago (multiple packages), so as a high speed cache for larger memory pools it may be viable (newer HBM standards are faster). But Apple probably aren't going to bother going down that path due to complexity.
It would be interesting though.
The price of HBM increased by 5x this last year alone due to AI/ChatGPT and are mostly only used in enterprise and server class hardware that starts at $30K. Complexity designing for multiple 1024-bit memory channels and currently max capacity of 24GB makes it pretty much a nonstarter.
LPDDR provides ample of bandwidth for the foreseeable future.
Yeah, I agree. Also, the power consumption of HBM is too high, and specializing the RAM goes against Apple’s volume manufacturing strategy.
What I see them doing is gradually increasing the RAM interface width. The rumored RAM capacities of M3 lead one to speculate that it might have an extra memory channel. It might be cheaper and more feasible for them to increase the bus width to 192bits and use the same RAM modules instead of upgrading to more less available LPDDR5X. And they already have some patents that discuss migrating data between controllers and shutting down memory channels if performance is not needed, which would compensate for the higher power consumption of a wider bus…