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90nm PowerMac G5s in March 2004?
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As far as people discussing the Fishkill plant--
When KLA-Tencor was first offered the job (of providing the testing equip and such at Fishkill) they decided it was their chance to show that they can beat out Applied. They went all out on the job, so trust me when I say Fishkill will not be a hold-up anymore.
I believe the earlier hold-up was due to some quirks in the first run of the chips. This always happens, you never know what may go wrong until you actually start pressing cores. I believe now since they have the initial design ready to go things will just start flying off the line.
At the same time, if IBM is to announce this silicon in February, chances are they will be ready to start the first run just then. I doubt that they will allow Apple to announce a product carrying the new chip until IBM has had a chance to get all the PR for releasing it themselves. They don't want Apple to steal their thunder, because IBM is looking at this to be the next big server platform for DB2, Websphere, and all their other applications.
When KLA-Tencor was first offered the job (of providing the testing equip and such at Fishkill) they decided it was their chance to show that they can beat out Applied. They went all out on the job, so trust me when I say Fishkill will not be a hold-up anymore.
I believe the earlier hold-up was due to some quirks in the first run of the chips. This always happens, you never know what may go wrong until you actually start pressing cores. I believe now since they have the initial design ready to go things will just start flying off the line.
At the same time, if IBM is to announce this silicon in February, chances are they will be ready to start the first run just then. I doubt that they will allow Apple to announce a product carrying the new chip until IBM has had a chance to get all the PR for releasing it themselves. They don't want Apple to steal their thunder, because IBM is looking at this to be the next big server platform for DB2, Websphere, and all their other applications.
this is disgusting...
dual 3 Ghz with all those extras? YAAAACK! Phew phew, that is disgusting. The raw speed of it offends my stomach, and I wretch in glorious tribute to it's disgusting power...
Seriously, my 2gz is still making me feel a little guilty . Do I deserve such speed and power? It happens whenever I open sherlock or some other program and it comes up - like - instantly. Somewhere in the back of my brain I hear "you're not worthy!". This 3 gz is gonna kill my self esteem.
Pipe, Copper...
dual 3 Ghz with all those extras? YAAAACK! Phew phew, that is disgusting. The raw speed of it offends my stomach, and I wretch in glorious tribute to it's disgusting power...
Seriously, my 2gz is still making me feel a little guilty . Do I deserve such speed and power? It happens whenever I open sherlock or some other program and it comes up - like - instantly. Somewhere in the back of my brain I hear "you're not worthy!". This 3 gz is gonna kill my self esteem.
Pipe, Copper...
I've always wondered why IBM would just sit back and let Apple put G5s in the Xserve thinking it's aiding the competition. However, the Xserve's have yet to come out leading me to think maybe IBM had an agreement with Apple to get G5s to the desktop while IBM gets the Power 4-5 going on it's server's first. So the trickle down 970 and 980 for Apple happen first for the desktops, but after IBM get the server market going.
Does this mean they designed that huge new case with all it's sophisticated cooling for nothing?
just one point. I heard earlier someone griping about integer performance. I think this is a huge misconception. Currently integer perf is bang up there with the best of em particularly in dual processor systems where integer scores are better than dual xeon 3GHz+ systems.
Furthermore, let us not forget that only recently a compiler was released that could work the dual fully featured integer units. And work them in parallel as they were designed. GCC does not do this. The integer situation is most definately improving BIG TIME. as ars technica users have noted in teh forums. Its just the the design of the IBM 970 is so radical that new compilers are really needed to get it to run at its potential.
Furthermore, Altivec is able to boost integer numbers im told. Big time.
This is another area in compiler techniques where performance is going to sky rocket on the G5. Particularly on the same hardware. The bench's you see today on your dual 2GHz will skyrocket tomorrow as compilers are improved for the architecture. Furthermore , GCC does not autovectorise code for altivec. On the x86 side, GCC and intel C compielr autovectorise for intels and amd SSE and SSE2 extensions.
IBM have already promised that the next feature of their XLC and XLF compilers will be autovectorising for altivec. This will bring a massive improvement in both integer and fpu.
I think apart from Motorola not being able to scale their G4 processors fast enough.... they just didn't support them properly. They should have had an autovectorising compiler out years ago, like amd and intel had. If they weren't going to produce one themselves like IBM, at the very least they should have worked with APPLE on the GCC, a bit like the way IBM is hoping that its techniques in XLF and XLC are being worked into GCC... or at least thats what we are led to believe. Also with autovectorisation.
On a separate note, those you you who knew that i was having major heart ache with my recent apple order. I got a phone call today apologising. I have been told that they will ship my iBook to me separately free shipping so that i am not waiting any longer to get going.... and apparantly my G5 is currently in production and should be out of production in a day or two and should be with me friday week,
Fingers crossed!
Furthermore, let us not forget that only recently a compiler was released that could work the dual fully featured integer units. And work them in parallel as they were designed. GCC does not do this. The integer situation is most definately improving BIG TIME. as ars technica users have noted in teh forums. Its just the the design of the IBM 970 is so radical that new compilers are really needed to get it to run at its potential.
Furthermore, Altivec is able to boost integer numbers im told. Big time.
This is another area in compiler techniques where performance is going to sky rocket on the G5. Particularly on the same hardware. The bench's you see today on your dual 2GHz will skyrocket tomorrow as compilers are improved for the architecture. Furthermore , GCC does not autovectorise code for altivec. On the x86 side, GCC and intel C compielr autovectorise for intels and amd SSE and SSE2 extensions.
IBM have already promised that the next feature of their XLC and XLF compilers will be autovectorising for altivec. This will bring a massive improvement in both integer and fpu.
I think apart from Motorola not being able to scale their G4 processors fast enough.... they just didn't support them properly. They should have had an autovectorising compiler out years ago, like amd and intel had. If they weren't going to produce one themselves like IBM, at the very least they should have worked with APPLE on the GCC, a bit like the way IBM is hoping that its techniques in XLF and XLC are being worked into GCC... or at least thats what we are led to believe. Also with autovectorisation.
On a separate note, those you you who knew that i was having major heart ache with my recent apple order. I got a phone call today apologising. I have been told that they will ship my iBook to me separately free shipping so that i am not waiting any longer to get going.... and apparantly my G5 is currently in production and should be out of production in a day or two and should be with me friday week,
Fingers crossed!
64 bit laptops
Ahem, low-power (mobile friendly) Opterons/AMD64 processors and 64-bit Windoze XP are expected to be available relatively soon i.e. no later than one is likely to get a 64-bit PB, and possibly earlier. (Not that OS X is 64-bit as of v10.3, even though it runs natively on 64-bit CPUs.)
Apple is no longer competing with Intel, they are competing with AMD. AMD64 is an elegant and very scalable architecture that can give PPC a run for its money without breaking a sweat, and they are not standing still. I have no idea what Intel is doing, perhaps examining their navels.
Ahem, low-power (mobile friendly) Opterons/AMD64 processors and 64-bit Windoze XP are expected to be available relatively soon i.e. no later than one is likely to get a 64-bit PB, and possibly earlier. (Not that OS X is 64-bit as of v10.3, even though it runs natively on 64-bit CPUs.)
Apple is no longer competing with Intel, they are competing with AMD. AMD64 is an elegant and very scalable architecture that can give PPC a run for its money without breaking a sweat, and they are not standing still. I have no idea what Intel is doing, perhaps examining their navels.
Re: 64 bit laptops
Apple is competing with any company still on the market, wheter it be AMD or intel.
The PPC, unlike the AMD64, is much more scalable because IBM is behind it. We all know that "Big Blue" may be a hard pill to swallow, but in the end they can and will out perform AMD.
Windows XP is looking like it will be postponed to near-longhorn preportions. microsoft might even add it into longhorn, which is quite a ways off.
Apple is competing with any company still on the market, wheter it be AMD or intel.
The PPC, unlike the AMD64, is much more scalable because IBM is behind it. We all know that "Big Blue" may be a hard pill to swallow, but in the end they can and will out perform AMD.
Windows XP is looking like it will be postponed to near-longhorn preportions. microsoft might even add it into longhorn, which is quite a ways off.
Memory controller
I hope they do this. It is the primary reason Opterons tend to be a bit faster than PPC970s for most tasks at a given clock speed (ignoring the relatively narrow set of applications that use Altivec and similar). If the PPC970 had on on-die memory controller it would most likely put it neck and neck with AMD64. I am guessing it is the primary reason that both our databases and supercomputing applications are faster on Opterons, all other things being equal.
I hope they do this. It is the primary reason Opterons tend to be a bit faster than PPC970s for most tasks at a given clock speed (ignoring the relatively narrow set of applications that use Altivec and similar). If the PPC970 had on on-die memory controller it would most likely put it neck and neck with AMD64. I am guessing it is the primary reason that both our databases and supercomputing applications are faster on Opterons, all other things being equal.
Re: Re: 64 bit laptops
Have you actually compared the cores on a detailed level? The AMD core design is quite elegant, and actually looks less hacked together than the PPC970 core and is of a more general purpose design. The next major version of the Opteron is supposedly going to be a hyperthreaded multi-core design, and they have a lot of headroom for clockspeed, so PPC isn't going to pull ahead any time soon.
People forget how long AMD has been in the CPU design business (e.g. their popular 29k-series RISC processors). They are quite competent at designing efficient cores, which is evident in the relative performance of their ia32 compatible CPUs at a given clock speed, and the extremely high performance of their amd64 CPUs compared to anything else.
I don't want to sound like an AMD fanboy, but they are a very competent silicon design company that produces cutting edge products that are as well-engineered as anything else on the market. Remember, the excellent HyperTransport technology and chipsets that Apple and IBM use were not developed by either IBM or Intel, but principally by AMD and a couple other companies (including Apple). Now that their designs are not constrained by the necessity of Intel compatibility, expect them to move very fast with innovative and high performance designs, like AMD64 and HyperTransport. IBM will have to work hard to keep up with AMD, and AMD can't slack off like IBM can because AMDs core business IS selling high-end silicon, not systems (as evidenced by IBM selling AMD64 systems as well).
Have you actually compared the cores on a detailed level? The AMD core design is quite elegant, and actually looks less hacked together than the PPC970 core and is of a more general purpose design. The next major version of the Opteron is supposedly going to be a hyperthreaded multi-core design, and they have a lot of headroom for clockspeed, so PPC isn't going to pull ahead any time soon.
People forget how long AMD has been in the CPU design business (e.g. their popular 29k-series RISC processors). They are quite competent at designing efficient cores, which is evident in the relative performance of their ia32 compatible CPUs at a given clock speed, and the extremely high performance of their amd64 CPUs compared to anything else.
I don't want to sound like an AMD fanboy, but they are a very competent silicon design company that produces cutting edge products that are as well-engineered as anything else on the market. Remember, the excellent HyperTransport technology and chipsets that Apple and IBM use were not developed by either IBM or Intel, but principally by AMD and a couple other companies (including Apple). Now that their designs are not constrained by the necessity of Intel compatibility, expect them to move very fast with innovative and high performance designs, like AMD64 and HyperTransport. IBM will have to work hard to keep up with AMD, and AMD can't slack off like IBM can because AMDs core business IS selling high-end silicon, not systems (as evidenced by IBM selling AMD64 systems as well).
I'm no zealot...
...but i play one in this forum...Apple with IBM just kicks buttocks. I am so amazed at what IBM is doing with these chip designs. I cannot wait till rev B of the Powermacs. by the time it comes out i shall grab one from the store. And the powertune thing- sounds very promising indeed...good time to be alive. 🙂
...but i play one in this forum...Apple with IBM just kicks buttocks. I am so amazed at what IBM is doing with these chip designs. I cannot wait till rev B of the Powermacs. by the time it comes out i shall grab one from the store. And the powertune thing- sounds very promising indeed...good time to be alive. 🙂
Elegant CPU design
I'm no EE but the following figures speak well of IBM:
______________die size_______transistors
______________[mm^2]_______[million]
PowerPC970____121__________52
Athlon64_______193__________105.9
Pentium4 EE____237__________178
Just a few power usage specs for the 970:
1.2GHz at 19W, 1.8GHz at 42W, 2GHz at 57W
I don't have any handy for the Athlong64 and P4EE. Would be nice, though.
Anyway, IBM seems to achieve quite a lot with fewer transistors and less die area.
Eirik
I'm no EE but the following figures speak well of IBM:
______________die size_______transistors
______________[mm^2]_______[million]
PowerPC970____121__________52
Athlon64_______193__________105.9
Pentium4 EE____237__________178
Just a few power usage specs for the 970:
1.2GHz at 19W, 1.8GHz at 42W, 2GHz at 57W
I don't have any handy for the Athlong64 and P4EE. Would be nice, though.
Anyway, IBM seems to achieve quite a lot with fewer transistors and less die area.
Eirik
Re: Memory controller
Not only that, but Dual Opterons for example if in 4 + 4 memory configuration are dual channel to each bank - whereas with the G5 it is just dual channel from the memory to the controller. Putting a memory controller onchip could allow them to simplify the controller (just AGP), and almost double memory bandwidth to a local bank, since you don't have the other CPU getting in the way (a far memory access to the other CPU's bank may be slower, but the FSB is 1ghz, so it can shovel the bits quite fast).
I've heard that with IBM's Power design team the design is fairly high level construction, so they should be able to mix and match parts on chip easier than a full custom, hand-optimised design.
The good news is, if you think the current G5 is fast, you haven't seen anything yet. 😀
-Wyrm
Not only that, but Dual Opterons for example if in 4 + 4 memory configuration are dual channel to each bank - whereas with the G5 it is just dual channel from the memory to the controller. Putting a memory controller onchip could allow them to simplify the controller (just AGP), and almost double memory bandwidth to a local bank, since you don't have the other CPU getting in the way (a far memory access to the other CPU's bank may be slower, but the FSB is 1ghz, so it can shovel the bits quite fast).
I've heard that with IBM's Power design team the design is fairly high level construction, so they should be able to mix and match parts on chip easier than a full custom, hand-optimised design.
The good news is, if you think the current G5 is fast, you haven't seen anything yet. 😀
-Wyrm
manitoubalck
macrumors 6502a
Re: Re: Memory controller
The north bridge has other tasks becides memory and AGP. Communicating with the south bridge, PCI bus and back pannel ports as well plus plenty of others.
But your point is still very strong and an on-chip memory controler would be a great advantage. So would RAMBUS but that's not going to happpen
The north bridge has other tasks becides memory and AGP. Communicating with the south bridge, PCI bus and back pannel ports as well plus plenty of others.
But your point is still very strong and an on-chip memory controler would be a great advantage. So would RAMBUS but that's not going to happpen