Apple Supplier TSMC to Produce 3nm Chips at Arizona Plant

[bn-7bc]

The A16 and M2 were mediocre at best. The 3nm M and A-series chips next year better be amazing because if not, it's going to be apparent that Apple has really lost a lot of their top engineers to Qualcomm and other companies.

Where the chips mediocre, or was the thermal management in the devices using them mediucre, forcing the devices to thermotrottle? Don't get me wrong it's still on apples head but saying the chip is mediocre when the issue js poor thermal management might be missleading. Fair ennugh ther might be a design flaw in the chip design causing them to consume more power than needed and yhus running hotter, but if the device had more thermal mas ir gid firbid active cooling ( ie a fan) this might not have been an issue at all

 

[nt5672]

Umm there are a lot of outstanding Chip engineers in the US and Europe as well. That might be a generalization.

Agreed, but I said chip manufacturing engineers, not chip design engineers.

 

[Tagbert]

Where the chips mediocre, or was the thermal management in the devices using them mediucre, forcing the devices to thermotrottle? Don't get me wrong it's still on apples head but saying the chip is mediocre when the issue js poor thermal management might be missleading. Fair ennugh ther might be a design flaw in the chip design causing them to consume more power than needed and yhus running hotter, but if the device had more thermal mas ir gid firbid active cooling ( ie a fan) this might not have been an issue at all

There were complaints that the passively cooled MBA could hit a thermal limit under unusually high load but the actively cooled MBP 13" did not. Somehow that was seen as a failure of hardware design and "why didn't Apple just put a fan in the Air?" which completely missed the point of the Air.

The "mediocre" designation seems to be because the CPU performance was only 18% more than the M1 while the M1 was a massive improvement over the previous Intel chips. People seemed to expect the M2 to have a similar jump in performance when there wasn't any reason for such a jump.

 

[nimitz9]

Arizona is the absolute dumbest place for semiconductor plants. (Well, you could add Nevada and most of California to that list too.) Yes, modern plants do massive water recycling... but they require an absolute massive amount of water in the first place, recycled or not. So, yeah, let's just build a plant where there's a 1000 year drought and no real hope of things getting better. Plenty of the US has ample water supply and would make a lot more sense.

True about water requirements. So much other infrastructure is all ready in place in Phoenix for semi manufacturing. All the equipment manufacturers inside the fab have a huge presence in Phoenix. TEL, ASMR, Canon, Nikon and all the others. That becomes very important when a production machine can't be fixed by TSMC in-house employees and an equipment manufacturer repairman has to show up(fast) to fix it. All the chemical companies that provide semi manufacturing chemicals are there all ready. Not to mention the human talent, all those former Intel, Motorola, ST Micro, Freescale semi, ON semi and on and on, is ready to go in Phoenix.

 

[sam_dean]

3nm

- M2 Pro
- M2 Max
- M2 Ultra
- M2 Extreme

Just wish Apple would double the power input of the SoC destined for desktops.

 

[Northgrove]

No my gurd... 3 nanometer! what happens when they reach zero nanometers do they are start using negative numbers?? Also - hopefully these get made at the new AZ plant.

Hard to tell but anyway it's not really 3 nanometers, that's just what they call it. These chips (3 nm) have gate pitch around 48 nanometers and tightest metal pitch about 24 nanometers. They just call it like this for marketing reasons and it was a long time since they deviated from gate pitch. Since then they use other tricks to achieve density as if they were this small.

Also, 5 nm from, say, AMD is not as dense as 5 nm from e.g. Intel. Confusing...

They should really use something for the density instead, like million transistors per square millimeters (MTr/mm2) but I guess it's not as marketable. Here's a fun density chart over time: https://en.wikipedia.org/wiki/Transistor_count

 

[jdb8167]

I think it's great that they're finally manufacturing in the US but not sure why they would have picked Arizona, being in a desert and all. Semiconductor manufacturing is very water intensive. Here's some light reading.

Water shortages loom over future semiconductor fabs in Arizona

Water and semiconductor shortages come to a head in Arizona.

www.theverge.com

Micron is opening a $20 billion plant in Syracuse, NY. That’s smart since it rains or snows almost every day. Lots of water but a miserable place to live. Grew up there. Never would want to move back.

Micron picks Syracuse suburb for huge chip plant

 

[sam_dean]

Hard to tell but anyway it's not really 3 nanometers, that's just what they call it. These chips (3 nm) have gate pitch around 48 nanometers and tightest metal pitch about 24 nanometers. They just call it like this for marketing reasons and it was a long time since they deviated from gate pitch. Since then they use other tricks to achieve density as if they were this small.

Also, 5 nm from, say, AMD is not as dense as 5 nm from e.g. Intel. Confusing...

They should really use something for the density instead, like million transistors per square millimeters (MTr/mm2) but I guess it's not as marketable. Here's a fun density chart over time: https://en.wikipedia.org/wiki/Transistor_count

Before nanometer (nm) there was micrometer (µm).

Ex: 1µm =1,000nm

After nanometer we will be using picometer (pm)

Ex: 2nm = 2,000pm

The popular term used for less than 1nm is sub-1nm.

I expect the 1st actual sub-1nm die shrink that is not a marketing term to occur by around year 2032.

 

[jdb8167]

Before nanometer (nm) there was micrometer (µm).

Ex: 1µm =1,000nm

After nanometer we will be using picometer (pm)

Ex: 2nm = 2,000pm

The popular term used for less than 1nm is sub-1nm.

I expect the 1st actual sub-1nm die shrink that is not a marketing term to occur by around year 2032.

No. The industry is going to go with Ångströms.

 

[bn-7bc]

There were complaints that the passively cooled MBA could hit a thermal limit under unusually high load but the actively cooled MBP 13" did not. Somehow that was seen as a failure of hardware design and "why didn't Apple just put a fan in the Air?" which completely missed the point of the Air.

The "mediocre" designation seems to be because the CPU performance was only 18% more than the M1 while the M1 was a massive improvement over the previous Intel chips. People seemed to expect the M2 to have a similar jump in performance when there wasn't any reason for such a jump.

Aha, so this was more a case of Apple failing to deliver on un real expectations rather than the chip being mediocre. I would say the given recentlerformance advances on other ISAs 18% is prity good for 2 years, esp considering nothing really worked at full tilt during Covid

 

[DeepIn2U]

When China invades Taiwan, we have to be prepared for Taiwan to move to the U.S. Not saying that is good or bad, but the only remaining good chip manufacturing engineers are in Taiwan and China.

They've already started a team in the USA which will be training new employees about their advancements in the fab.

Don't worry the information knowledge transfer will not be limited.

 

[DeepIn2U]

Its about time they start bringing manufacturing back to the US.

There is a VERY interesting historical youtube video on why the USA lacked manufacturing starting back in the 50's.

Everyone is asking to 'start' and the recent embargo's etc lead to that happening - or playing catch up