Are there any systems with dual socket ARM processors?
Yes.
"... Thunder X3 ...
The design comes in either 1 or 2 socket configurations, and the inter-socket communication uses CCPI (Cavium Cache Coherent Interconnect) in its 3rd generation, with 24 lanes at 28Gbit/s each, between the two sockets. .."
www.anandtech.com
Previous iteration X2 had dual sockets also .
"..
- Up to 4 TiB in dual-socket configuration
- ISA: ARMv8.1, 128-bit NEON SIMD "
ThunderX2 is a family of 64-bit multi-core ARM server microprocessors introduced by Cavium in early 2018 succeeding the original ThunderX line.
en.wikichip.org
There are some cloud nodes that a populated with these doing work every day. ( didn't "take over" the whole market but there are edge cases and edge processing contexts where they make more sense than AMD/Intel offerings. )
Also
"... Ampere’s Altra is a realized version of Arm’s Neoverse N1 enterprise core, much like Amazon’s Graviton2, but this time in an 80-core arrangement. ...
..., offers support for FP16 and INT8, supports 8 channels of DDR4-3200 ECC at 2 DIMMs per channel, and up to 4 TiB of memory per socket in a 1P or 2P configuration. Each CPU will offer 128 PCIe 4.0 lanes, 32 of which can be used for socket-to-socket communications implemented with the CCIX protocol over PCIe. This means 50 GB/s in each direction, and 192 PCIe 4.0 lanes in a dual socket system for add-in cards. Each of the PCIe lanes can bifurcate down to x2. ... "
www.anandtech.com
Also.. When these processors access ram is it the same process like a CPU x86?
Generally, yes.
Dual socket systems for example need 128gb of ram on each CPU for a total of 128GB for the system. Am I way off?
given that 128gb is 8 times smaller than 128GB ... yeah that is way off. (b -- bit , B -- byte ).
The "need" for triple digit RAM is more so primarily driven by the working set data footprint. Bigger data sets need more RAM so that the data is 'closer' to the cores than more persistent ( at rest ) data storage.
Dual socket servers are actually a declining market segment. Approaching the point where going to get > 100 cores per socket. Amazon didn't even try to cover two package systems with their ARM Neoverse N1 implementation. Even the cloud hosting folks start to run out of customer bases that actually need that kind of scale. They exist. Not going away. But also not a generally a growing pool of users.
There is non uniform memory access (NUMA) on the package. Throw multiple package NUMA on top of that and it becomes more issues to chase down in implementation and in OS stack complexity.
Apple is highly unlikely to do any dual socket anything. As mentioned these systems are declining; Apple generally avoids shrinking markets. Additionally, macOS currently can't really handle anything with more than 64 cores. iPhones and iPads don't need anything like that number of application core counts. Neither do MacLaps. Apple probably has extremely low motivation to "fork" the core kernel and scheduler just for a niche of a niche of a niche product. Some monstrous Mac Pro isn't really a driver of major future macOS development paths. Apple is highly likely going to pursue something like 28-38 clocked faster cores before anything along the lines of going wider-and-slower clocks. The stuff that is at the highest end of "embarrasingly parallel" they are also likely to farm out to Tensor/AI/ML cores or to GPU cores. Which has about zero impact on the core application OS kernel schedulers ( so can easily share with the iPhones. ) .
The bigger is though is that Apple is generally into making smaller systems . The Mac Pro 2019 was an exceptional corner case. But that bigger isn't about the CPU. The Mac Pro 2019's 'biggness' is primarily more so driven by having 8 slots ( 4 of which is double wides ... so pragmatically 12 slot widths that contribute to the height (in the vertical orientation. ) . Generally in Macs though Apple likes smaller logic boards so there is more space for batteries in mobile devices.