I have a few different CPUs that I could run some tests on if there's something in particular that people want to see.
Cool, we'll await your results, should be interesting.Mostly to satisfy my own curiosity I timed how long it took to compile TFF from source. There is a thread on doing that here:
forums.macrumors.com/threads/the-unofficial-tenfourfox-development-toolkit.2291789/
I was wondering how much of a difference the L2/L3 cache sizes would make for this task, so I'm repeating the build on the same computer after changing out the CPU for each test. So far, a 1.6GHz 7457 with 2MB of L3 cache is faster than a 2GHz 7447. I'm running the 7448 right now, and I want to also try a dual CPU. Each test takes a while to run but I should have some numbers to update this thread with before too long.
Thanks for taking the time to do these real world benchmarks, I have to say, this is pretty much what I expected to see.Here's an update with the 7448 result. The cache seems to make a big difference on an "overloaded" system:
4.1h 1.6GHz 7457 2MB L3 Dual CPU
7.5h 2.0GHz 7448
8.1h 1.6GHz 7457 2MB L3
9.4h 2.0GHz 7447
The extra L2 cache on the 7448 shaves almost 2 hours off the build time.
800Mhz QS without the L3 cache?I put the original 800MHz CPU back in and it's grinding away... any guesses?![]()
a Potential workaround for the L3 cache issue that I would try is to see if you can reprogram the SPD type EEPROM that are on these cards, with appropriate firmware you can increase the clock to cache ratio which would mean for a given clock speed the L3 cache Chips are run at a lower speed which would then allow you to clock the CPUs faster without hitting the L3's own clock limit so quicklySeeing these tests, I'm debating on whether or not it's worth creating a 745x-744x interposer board, allowing you to install 7448 CPUs on machines such as a PMG4 MDD, or just installing 7457s. The only issue I've ran into with the latter option is finding faster L3 cache chips, allowing you to clock the CPU faster (the L3 cache chips run at a ratio based on the CPU clock). If I could find some ~350 MHz rated L3 cache, I could probably get the 7457s running at around 1.6 GHz or so. I did make a video about my most recent upgrade here if anyone cares to take a look:
Oh, yes! I had a 1.25 GHz card I dumped the SPD EEPROM from, but not a 1.42. I'll have to try that with my 250 MHz L3 chips. However I noticed on the 1.25 GHz card, it has 300MHz-rated chips.a Potential workaround for the L3 cache issue that I would try is to see if you can reprogram the SPD type EEPROM that are on these cards, with appropriate firmware you can increase the clock to cache ratio which would mean for a given clock speed the L3 cache Chips are run at a lower speed which would then allow you to clock the CPUs faster without hitting the L3's own clock limit so quickly
View attachment 1921614
a 1.42Ghz Firmware would give you a clock ratio of 6:1 and allow you to clock further with existing chips
here is a link to where you can find a dump of a 1.42Ghz MDD cards "SPD" EEPROMhttps://68kmla.org/bb/index.php?threads/building-the-fastest-power-mac-9600.31076/#post-331668
although I do think a some BGA483 745x to BGA360 744x interposes would be very neat! I do know that theres 1 person who has managed to make such an interposer but i dont think any details have ever been shared about it sadly
it would be really fun to see if one could install a 7448 via one of these interposer cards onto a Sonnet 7455 PowerMac 730-9600 Upgrade card
and make a 7448 Power Macintosh 9600![]()
Ooh 300Mhz chips thats nice should give you even more potential main CPU clock speedOh, yes! I had a 1.25 GHz card I dumped the SPD EEPROM from, but not a 1.42. I'll have to try that with my 250 MHz L3 chips. However I noticed on the 1.25 GHz card, it has 300MHz-rated chips.
Found some 300 MHz 1MB chips. I'll install them onto my card, flash that SPD EEPROM dump, and see how fast I can get it to run.Ooh 300Mhz chips thats nice should give you even more potential main CPU clock speed
just one thing to keep in mind of course when swapping SPD EEPROMs/Firmwares about is to that some CPU cards have 1MB of L3 per CPU while others have 2MB
and even of the same speed they can be differently configured for maximum confusion LOL, namely the Firewire 400 Dual 1.25's had 2MB of L3 but the Firewire 800 1.25's had 1MB (because the expensive 2MB config was reserved for the high end 1.42)
Just for reference my QS Dual 1ghz with 1MB L3 cache built the Linux kernel under Debian in 17 hours...
Linux has it's own code for DFS mode, the machine was DFS_HI when I compiled the kernel and I set it to one process, as I have before experimented with running more than one process one single cpu units building the kernel and it slows things down a bit.Do you happen to know how many processes were used in each case? I suspect trying to run a bunch of simultaneous jobs on a single CPU bogs it down with context switches that make the cache less effective. Also, was the powerbook at half speed (DFS)?
One more comment, which CPU does your quicksilver have? The stock dual 1GHz Quicksilvers usually had 7455 chips with 2MB of L3 cache.
How did you get your 7457s running at 1.6 GHz? I couldn't manage to get mine running well at that speed (which may be due to the older VRM design on the older card I was using).Updated list with the stock 800MHz CPU:
4.1h 1.6GHz 7457 2MB L3 Dual CPU
7.5h 2.0GHz 7448
8.1h 1.6GHz 7457 2MB L3
9.4h 2.0GHz 7447
19.4h .8GHz 7455
Mate, great videos, great work all round. I envy your skill.The 2MB L3 cache upgrade was successful, and I was able to get the 7457s on my card running at 1.5 GHz. Made a video about it here:
Doing this requires an interposer board, to allow 744x series CPUs to be installed in place of 745x. I tried making one, but it didn't work. You also lose L3 cache completely. Best thing to do is just stick to a 7457 at 1.5 GHz or so, and upgrade the L3 cache to 2MB if necessary.Mate, great videos, great work all round. I envy your skill.
Do you know of anyone who is willing and able to perform a dual 1.25ghz to 2ghz conversion for an MDD?