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Sounds like they are still hand placing certain blocks. BP was always a good RLM for that. The CAD group was oversubscribed so the flows were very unstable. They were far more concerned with using hashes so engineers couldn't cheat on the checkpoints. When it comes to performance reviews engineers cheat :) Ironically, AMD's flow has been stolen by so many ex employees who went to startups. Why anyone would want to steal it is beyond me.

:-( As co-inventor of ace, you make me sad.
 
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:) Do the numbers actually align to anything, though? Like, physically, is there anything you can examine and say “Yup, this is 5nm instead of 7nm for sure!”

Pragmatically, they have turned into a simple metric ( single/double digits ) to indicate density to the folks who buy the end products. Where lower number is higher density. When get to "angstroms" will go back to double digits so can iterate back to single digits.

Different features on a chip have different density ( everything on a chip doesn't have same implementation sizes) so it is a multiple dimension metrics all funneled into a easy to communicate number. Piled on top of that elements on the chip are 3D... yet another dimension that to map into a single number. So effectively an approximation of relative density. An. Intel, Samsung , and TSMC '4' are suppose to be in the same ballpark of each other. None of them are measuring exactly the same thing in a single dimension with the same criteria.

Intel and TSMC use labels as "intel 4" and 'TSMC N4' . There isn't 'nm' suffixes put on that when look at the general marketing material from the boundaries. Increasingly, it is mainly the tech media or system vendor (non foundry) that tosses the 'nm' into the mix.

Like "MHz" (and "GHz" ) wars the numbers work better when comparing across specific vendors (evolutionary) implementations than across vendors.
 
:-( As co-inventor of ace, you make me sad.

I'm not familiar with ace but I'm sure it was far superior to what BAXE x.0 had become :) Overall the AMD flows are still superior to Intel's but worse than other "big tech" companies (except Google's gchip and platform team).
 
I'm not familiar with ace but I'm sure it was far superior to what BAXE x.0 had become :) Overall the AMD flows are still superior to Intel's but worse than other "big tech" companies.

Before Abe and ace, each tlm owner did their own thing. As long as I produced a def and a Netlist that was good enough. It was chaos. We always asked Synopsys and cadence to benchmark against our flows - they always came in 20 percent too big or 20 percent too slow designing the same block. So for all its flaws, at the time the AMD flow was a huge competitive advantage. I mean we had, what, a couple dozen people on k8? Compared to how many hundred on any Intel chip? It did require that designers really understand a lot, though.

It’s also weird because the flow was designed by tlm owners and not a CAD team. By the time I left there was a pretty large CAD team, which is one of the reasons I left - power to control the methodology had shifted.
 
This article reads very much to me like, "Intel has declared that it's asking for a real live unicorn for Christmas." TSMC has a fixed amount of production capacity, particularly for the more leading edge stuff. Apple has a lot of this sewed up tight, and is part of the reason that TSMC has that capacity in the first place. Intel is going to ask for a larger share of fixed production capacity. Who, precisely, is Intel suggesting that TSMC should break contracts with, to free up this capacity? Or is Intel suggesting that they'll funnel a fleet of boatloads of cash into TSMC to fund building some more fabs?

The N3 production line isn't necessarily shared with. N5 , N6 , N7, etc.

N3 is only just gone into 'at risk' so it was mainly folks submitting experimental R&D wafer starts up until recently.

The number of ASML EUV production units assigned to the N3 production line will change over time. The capacity is only "fixed" until TSMC lights up more fabrication units assigned to the line. It doesn't stay constant forever.

As far as Meteor lake being a "fantasy unicron".... Intel is already making them in low numbers.

"... Individual chiplets are visible in this closeup of Meteor Lake test chips that pave the way to the PC processor's release in 2023. Intel's Foveros technology bonds the chiplets into 3D stacks. ... "
20210819-intel-arizona-fab-11.jpg





Picture of several packages. Each package has four tiles (chiplets ). Not using fully functional TSMC tiles/chiplets here but the pictures are of the packaging R&D being flushed out.


They have powered on the. "compute" tile. ( the big tile in the packages above )



Now some folks will label these as "rumored" products because not shipping in the store and can't order from Newegg or pick up at Microcenter.

But already in flight. The GPU is likely one of the relatively smaller tiles on the package. Smaller means Intel can get more tiles out of a single wafer than Apple can for most of the M-series. Intel is making the biggest tile there in their own fabs ( Intel 4 in low volume at the moment. ). Intel isn't asking TSMC to make the "whole thing"; just a part of the package.

These don't have to be "big" GPUs. Just the ~30 Xe-Core for an iGPU for the mainstream desktop product. (probably smaller than Apple's GPU cores and definitely smaller than CPU+GPU+kitchen sink the complete M-series SoC dies have. ) . Extremely likely that Intel will eventually have a wide range of GPU dies on TSMC N3 , but they don't need to launch them all at once and as soon as possible. Intel can phase into the N3 production capacity growth over time.
 
Apple isn't just another customer like AMD but a critical partner. Apple consumes over 25% of all TSMC's output and virtually all of their leading edge process node from risk starts to early ramp.

RevenueSplit.png



The 90nm+ is 14% of the revenue and the 5nm stuff is 14% of the revenue. What is the likelihood that TSMC is charging the exact same price per wafer for both? Pretty close to zero!!!! If the much cheaper 90nm+ is making the same revenue as the 5nm stuff then it must be shipping in higher volume.

Apple may be putting in 25% of the upfront money to build new stuff and buy wafers... but that isn't the output from the fabs.
 
The N3 production line isn't necessarily shared with. N5 , N6 , N7, etc.

N3 is only just gone into 'at risk' so it was mainly folks submitting experimental R&D wafer starts up until recently.

The number of ASML EUV production units assigned to the N3 production line will change over time. The capacity is only "fixed" until TSMC lights up more fabrication units assigned to the line. It doesn't stay constant forever.

As far as Meteor lake being a "fantasy unicron".... Intel is already making them in low numbers.

"... Individual chiplets are visible in this closeup of Meteor Lake test chips that pave the way to the PC processor's release in 2023. Intel's Foveros technology bonds the chiplets into 3D stacks. ... "
20210819-intel-arizona-fab-11.jpg





Picture of several packages. Each package has four tiles (chiplets ). Not using fully functional TSMC tiles/chiplets here but the pictures are of the packaging R&D being flushed out.


They have powered on the. "compute" tile. ( the big tile in the packages above )



Now some folks will label these as "rumored" products because not shipping in the store and can't order from Newegg or pick up at Microcenter.

But already in flight. The GPU is likely one of the relatively smaller tiles on the package. Smaller means Intel can get more tiles out of a single wafer than Apple can for most of the M-series. Intel is making the biggest tile there in their own fabs ( Intel 4 in low volume at the moment. ). Intel isn't asking TSMC to make the "whole thing"; just a part of the package.

These don't have to be "big" GPUs. Just the ~30 Xe-Core for an iGPU for the mainstream desktop product. (probably smaller than Apple's GPU cores and definitely smaller than CPU+GPU+kitchen sink the complete M-series SoC dies have. ) . Extremely likely that Intel will eventually have a wide range of GPU dies on TSMC N3 , but they don't need to launch them all at once and as soon as possible. Intel can phase into the N3 production capacity growth over time.
Of course intel have new things in the pipe.

They had 10nm in the pipe for like 5-6 years of delays.

Meanwhile others are shipping stuff. What you can buy today is what matters.
 
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Well, if you're TSMC why would you give up any sort of hard-won advantage to a competitor with 1/3 your market cap?

Especially when that competitor is also a competitor/enemy of 3 of your biggest customers (Apple, AMD and Nvidia).

Crazy talk.


Intel has done a lot of sitting on ass since Sandy Bridge. They're reaping what they have sown.

You wouldn’t. That was my point.
 
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Basically "Intel's left hand has no freaking clue what its right hand is doing."

Well, both hands are flailing about wildly in panic after 10 years of being asleep at the wheel only to find both AMD and Apple are eating their lunch.


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I'm sure intel will recover. The US government simply won't let their foundry side go under as its otherwise an epic national security problem if the USA is reliant on third parties/other countries for their semiconductor manufacturing.

But holy hell they've been asleep for way too long to catch up inside the next 2-3 years.
 
Everyone here who thinks Intel is on the ropes needs to realize that Intel will never ever NOT explore every single avenue, financial, political or geopolitical to stay on course and at the top. You think Intel is on the ropes…sorry, you’re view is too narrow. Intel hasn’t been around this long without learning a thing or two about playing the long game. Nothing is out of bounds…nothing. Intel is as unpredictable now as they have ever been. The dragon cornered is the dragon most dangerous. There’s a reason why they’ve courted TSMC. I don’t think anyone at TSMC is dumb enough to fall for it, but Intel is never to be trusted. Their ulterior motives are to always be on top, remember that.
There was a company that had much this same mentality. They are called SEARS. How they doing, today?
 
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Altera uses TSMC for advanced fab. And Intel purchased Altera a few years back. So Intel is already (via gate array production) a bleeding edge customer for TSMC.
Ok, then why has Intel looked like it was run by a mixture of Inspector Clouseau and the Three Stooges for all this time?
 
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You're exaggerating.
AMD is also a very important client with a huge potential, bigger than Apple's I would say. Let's not forget that AMD sells data center chips which are higher margin that apple's chips and in very very high demand.
The reason why apple often introduces new nodes from TSMC is because smartphone SOCs are small and ideal for such situations. TSMC needs more time to roll out high performance optimized variants of their nodes, that hasn't changed.

Also, this close partnership TSMC has with apple is starting to affect them as AMD is looking to partner with Samsung for their 3nm node. Also Samsung is looking to aquire some of TSMCs clients. In the long run I don't doubt that Intel and Samsung will eventually match TSMCs nodes in performance.

My contention was that Apple is a strategic partner due to a rare *combination* of attributes that other fabless companies don't have. You've chosen to make individual isolated statements which, even if true, are irrelevant to the original claim. True, smaller die are better for leading nodes. So why are RFID chips not the process leaders ? Margins. Server chips are high margin so why didn't AMD launch Epyc on the same leading nodes as Apple ? Why isn't Intel launching Sapphire Rapids before client ? What node is Ampere using for their server processors ? What about Nvidia's accelerators for data center ? Network processors, for data centers, which go into million dollar routers ? See a pattern here ?

It's also true that TSMC needs time to roll out their nodes but how is that time spent ? Do they just run test structures and process control monitors for metrology or do they run through customer designs ? They don't just extract BSIM parameters from a ring oscillator, embedded in a scribe line, and crank out some design rules. Complex customer designs are better for accelerating yield improvement and PPA optimization but who gets the bill ? Pretty sure Ampere isn't signing up to be the early development and risk start patsy. Even if they pay to move the needle they don't have ROI due to volume and socket wins. Once again, missing factors makes all the difference.

AMD, Nvidia, Apple, Broadcom, Intel, Mediatek, Ampere, Cisco, Amazon, Google, etc. are constantly looking at fabs and evaluating a large number of factors. PPA is key but there's also the available IP portfolio and its maturity (both in house and third party), support for the customer's flow, PDK, metal stack, cost, contract terms (die buy, wafer buy, library re-characterization, sign-off corners, etc), schedule alignment, capacity, technical support, packaging and test, etc. Existing "close relationships" with other customers is not on the list. Not to mention that most fabless companies are not COT but will go through a vendor which will dictate which fab to target for a project.

Finally, process development is not like adding a feature to an iOS app. It's a very slow, rigorous, methodical, and moves at a fixed rate. It's not something you can accelerate by just throwing money and bodies at the problem. Intel was able to maintain a lead in process development because they had a head start and competitors could not close a three year gap even over decades. Like a bus that falls significantly behind schedule it's extremely difficult to catch up. Intel's arrogance is an additional handicap. During Intel's 14nm debacle some of the tool vendors, like AMAT, were trying to assist TMG by handing them the solutions to some problems. The TMG process engineers rejected them because they wanted to do it their own way. Also consider the fact that leading nodes require EUV litho which only comes from ASML. Every unit has already been pre-sold for the next few years so you're not scaling faster than that.
 
As much as I’d like to laugh at Intel it’s not good news that the formerly dominant chip maker is begging a foreign firm to help them. What do we do if/when China invades? We need leading edge chips designed and manufactured here for national security purposes. If World War 3 were fought today and it was between the USA and China I don’t see how we’d win. That’s not acceptable yet we are allowing it so C level executives can have more money than God. That’s unacceptable. We need to require that a certain percentage of any critical technology be entirely manufactured and sources here if it’s allowed to be sold here so if need be we are not SOL. The pandemic has shown us all the inherent danger of entirely overseas supply chains. When will we wake up? We won World War II because we had the world’s best manufacturing capacity, the most natural resources, one of the best education systems in the world and even then it took defecting German scientists to help us develop nuclear weapons. Anybody who thinks that is going to happen again if World War 3 were to be fought today between the USA and China needs their head examined.
 
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As much as I’d like to laugh at Intel it’s not good news that the formerly dominant chip maker is begging a foreign firm to help them.
They are not begging any more than AMD, Apple or Nvidia. It's all business. Sourcing some dies from external foundries gives them more flexibility and in some cases makes their products more competitive.

We need leading edge chips designed and manufactured here for national security purposes.
Intel's plan is to get back to a leading position in a few years. That's what you do after a stumble.

If World War 3 we’re fought today and it was between the USA and China I don’t see how we’d win. That’s not acceptable yet we are allowing it so C level executives can have more money than God. That’s unacceptable.
Why are you blaming Intel but not, say, AMD, Nivida or Qualcomm? Intel at least is still manufacturing advanced chips in the US. The others have outsourced everything years ago because it increased their profits.
 
Intel's plan is to get back to a leading position in a few years. That's what you do after a stumble.
Intel has always had a plan - their problem is sticking to it. Intel has had road maps for ages - problems is they should all had "Expect delays" on everyone of them. It was failure to meet one of these roadmaps (and producing a really buggy chip) that caused Apple to say 'nuts to this' and go elsewhere. And since the US today seems to have all the imagination of a post that somewhere was overseas.
 
Intel has always had a plan - their problem is sticking to it. Intel has had road maps for ages - problems is they should all had "Expect delays" on everyone of them.
The last few iterations since Tiger Lake have largely been delivered on schedule, and before they got into the trouble with their 10nm process they executed their "tick-tock" cadence like clockwork.

It was failure to meet one of these roadmaps (and producing a really buggy chip) that caused Apple to say 'nuts to this' and go elsewhere.
I suspect it had more to do with Apple wanting more control, maximizing profits and perhaps in the long term merging their Mac line with their iDevices. Other laptop makers had no trouble bringing attractive products to the market in this period. Apple could even have switched to AMD with much less effort than is required for the ARM transition. They would probably have switched to their own CPUs no matter what Intel did.
 
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