Intel is not gonna cry by loosing Apple, is a very small customer for them...as a former Intel eng. I know the hardship of building x64 architecture chips on anything smaller than 12 nm. We are talking about playing with single atoms almost...
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arm architecture, simpler than x64. That kind of architecture Intel is able to fit in 5 nm long time ago...It's not the same to build a car than a big commercial plane.
This post makes no sense. The physics problems that arise at smaller feature size (leakage, DFM issues, electro migration, IR drop, etc.) effect all instruction set architectures equally. The electrons and holes don’t care if you are RISC or CISC. Maxwell’s equations still apply.
Having designed powerpc, sparc, mips, and AMD64 cpus, I’ve not once found that one architecture works at a process node but another doesn’t. The only differences are yield. Some arch’s require more transistors than other.