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PowerMac 1.6GHz Benchmarks
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kiss-and-make-up time 
It's only there because the MR forums require at least three characters.
I'm more forgiving of things that have been learned through years of professional experience rather than lack of knowledge (or proofreading ).
In other words, in my first post I was trying to figure out what you meant by "SystemBus", guessed that you were talking about the bus between the controller and the slots et al., and explained that that bus ran at 800 MHz. In your reply to that post you basically ignored me and/or told me that I was wrong. I doubt you would have done that had you read the Dev Note at that time.
It sounds like maybe you've been working for a long time on systems where, for example, the interface between the north and south bridges is always a PCI-type bus running at the same speed as the slots. Well, that's not the case in the G5, and it seems like that's been the source of the confusion here.
HTH
Sorry for any hurt feelings; I hope we can be friends of sorts (on these forums at least )
WM
Accepted, and I appreciate your getting the period at the end of my username right.
It's only there because the MR forums require at least three characters.Yes, I think the '040s did often have FSBs that ran at processor speed.
Um, that was on a machine that only had an SDR system bus--in other words, the FSB bandwidth was half the RAM bandwidth. This is not the case on the G5 or most PCs.
Well, I did say "I'll grant people their shorthands".
I'm more forgiving of things that have been learned through years of professional experience rather than lack of knowledge (or proofreading ).Again, I'm sorry that you found it offensive, but once again I'm still not convinced that you've read the Dev Note. All I'm trying to get here is accuracy. I was trying to correct your apparent misunderstandings of the G5's architecture, which hopefully wouldn't have occurred had you first read the Note (which I referred to as "knowing what you're talking about").
In other words, in my first post I was trying to figure out what you meant by "SystemBus", guessed that you were talking about the bus between the controller and the slots et al., and explained that that bus ran at 800 MHz. In your reply to that post you basically ignored me and/or told me that I was wrong. I doubt you would have done that had you read the Dev Note at that time.
It sounds like maybe you've been working for a long time on systems where, for example, the interface between the north and south bridges is always a PCI-type bus running at the same speed as the slots. Well, that's not the case in the G5, and it seems like that's been the source of the confusion here.
HTH
Sorry for any hurt feelings; I hope we can be friends of sorts (on these forums at least
)WM
serious question...
WM., I actually have a serious question (something about the G5 that has caused a few questions)...I was looking at an Apple page (http://developer.apple.com/technotes/tn/tn2087.html) about the G5 and the differences to the G4...and something didn't quite seem right...
...about a year ago I watched Uncle Steve begin an Apple Keynote Speech about the "Megahertz Myth" (c. 2000), it was comparing the new (at the time) G4, Intel P4, MIPS and Athlon (I don't know if you're familiar with this presentation...it was archived on the ADC site until a couple weeks ago and vanished)...the argument for the G4 being more effiecient than the P4 was that it only had a more efficient Data Path because it used a "7 Stage Pipeline" rather than the P4's extremely inefficient "20 Stage Pipeline"...
...this address also "accidentally" pointed out (in an underhanded way by virtue of illustration) why the Athlon was faster (Clock-Cycle for Clock-Cycle) than the P4 also (the Athlon has a 10 Stage Data Path)...and from an archetectural standpoint makes beautiful logic...the address went on further to illustrate why it's so (and I really couldn't fault their logic on anything presented)...
...and that it was necessary for the P4 to run faster than the G4 to do the same work because of the longer Data Paths)...
now prefaced...
If the G4 is more efficient and faster (Cycle for Cycle) than the Pentium4 (because of 7-Stage vs. 20-Stage Pipelines)...and Uncle Steve is espousing the G5's improved efficiency over the G4 (and everything else for that matter).
Why then is the G5 using a Data Path with 23 Stages (and claimed higher efficiency), in contradiction to what they'd publicly stated a couple years ago when originally debunking the "Megahertz Myth"???
...now it seems there's been an "About-Face" in logic...saying "...we need more clock-cycles to keep up...and we're willing to sacrifice efficiency to get there...but seeing the overall result is faster...we'll tell everyone it's more efficient..."...it's just curious (to me at least)...
WM., I actually have a serious question (something about the G5 that has caused a few questions)...I was looking at an Apple page (http://developer.apple.com/technotes/tn/tn2087.html) about the G5 and the differences to the G4...and something didn't quite seem right...
...about a year ago I watched Uncle Steve begin an Apple Keynote Speech about the "Megahertz Myth" (c. 2000), it was comparing the new (at the time) G4, Intel P4, MIPS and Athlon (I don't know if you're familiar with this presentation...it was archived on the ADC site until a couple weeks ago and vanished)...the argument for the G4 being more effiecient than the P4 was that it only had a more efficient Data Path because it used a "7 Stage Pipeline" rather than the P4's extremely inefficient "20 Stage Pipeline"...
...this address also "accidentally" pointed out (in an underhanded way by virtue of illustration) why the Athlon was faster (Clock-Cycle for Clock-Cycle) than the P4 also (the Athlon has a 10 Stage Data Path)...and from an archetectural standpoint makes beautiful logic...the address went on further to illustrate why it's so (and I really couldn't fault their logic on anything presented)...
...and that it was necessary for the P4 to run faster than the G4 to do the same work because of the longer Data Paths)...
now prefaced...
If the G4 is more efficient and faster (Cycle for Cycle) than the Pentium4 (because of 7-Stage vs. 20-Stage Pipelines)...and Uncle Steve is espousing the G5's improved efficiency over the G4 (and everything else for that matter).
Why then is the G5 using a Data Path with 23 Stages (and claimed higher efficiency), in contradiction to what they'd publicly stated a couple years ago when originally debunking the "Megahertz Myth"???
...now it seems there's been an "About-Face" in logic...saying "...we need more clock-cycles to keep up...and we're willing to sacrifice efficiency to get there...but seeing the overall result is faster...we'll tell everyone it's more efficient..."...it's just curious (to me at least)...
Unfortunately, Apple has stated that these adapters won't fit in the G5 case. It is in the helper/FAQ pages on Apple's website.
What I am doing for my old ATA drives is sticking them in a spare ATX case, and running 36" round IDE cables to my PCI ATA adapter card in the Mac. Works like a charm. A bit messy looking though.
Re: serious question...
What I also hated about the "MHz Myth" was that Apple glanced over how fast each processor was running.
Say the P4 had 21 stages (to make my math easy). It is running at 3ghz, the G4 with 7 stages is running at 1ghz. In the same 1 second interval, the P4 has completed its pipeline 3x more than the G4 has. If they were running on an equal clock basis, the G4 would be more efficient, but they aren't. And if the P4 ran at 1ghz, it wouldn't have a 23 stage pipeline either.
What I also hated about the "MHz Myth" was that Apple glanced over how fast each processor was running.
Say the P4 had 21 stages (to make my math easy). It is running at 3ghz, the G4 with 7 stages is running at 1ghz. In the same 1 second interval, the P4 has completed its pipeline 3x more than the G4 has. If they were running on an equal clock basis, the G4 would be more efficient, but they aren't. And if the P4 ran at 1ghz, it wouldn't have a 23 stage pipeline either.
Read this article again because you've misread it. The DDR vs. SDR comparison occurs only on PowerMac's not in general. DDR is still twice as fast in bandwidth, but the two G4's share the same SDR bus and thus become data starved. The only area where the DDR actually would improve performance is when the AGP graphics cards run out of memory.
This doesn't apply to the G5's. In fact the only case it might apply is the single CPU 1.6Ghz. If you look at the spec sheet, you'll see they use significantly cheaper PC2700 RAM instead of the overkill PC3400 RAM. I'll note that the fastest Pentium 4 have the same bandwidth on their FSB but you still see a lot of people putting PC3400 RAM in them.
That problem isn't Apple's fault. The G4 of that era simply do not allow independent CPU buses nor scale up to DDR speeds. This will start to be fixed in later Motorola 130nm G4s. AMD Athlons have similar problem on a microarchitecture scale (the tiny data width on memory access keeps the pipes from being fed) which is why they give up performance to P4s on the top end.
But since you don't have space in the case anyway, you can't use them. You might have a valid point that the case doesn't leave any room for legacy adapters but now we're quibbling over a cheap $150 drive (because the data can easily be transferred with Carbon Copy Cloner). On a more aesthetic note, putting a SATA adapted IDE drive in a G5 is positively sinful. What I'd do is buy a Firewire 800 case (they get cheap the more drives you have) or a Super Drive Dock and turn them into "removeables". Sure, that's more cables, but this has a lot of uses (such as portability) beyond which an internal gives you. SATA is the thing to put in: faster hard drives, faster bus, independant channels, smaller cables, hot swapabillity, single cable, jumperless, no interference issues, less voltage. If Apple put in IDE then people would really feel crippled in 5 years--Macs are used far into the future (or resale at high prices) and the design needs to think in terms of future standards, not current.
Arguing about not including the archaic IDE sounds to me much like when people complained that the iMac and the G4 PowerMac didn't have a 3.5" diskette drive.
Besides, for the vast majority of people, there is no need for a G5. For what I see more people use their computers for a iMac is good enough and a PC is probably better (since they seem to play a lot of video games). The MDD 2x1.25Ghz G4 is an excellent machine that boots OS 9. Other than FW800, I fail to see what it gives up to the FW800 model. Certainly not performance--you just pointed a series of benchmarks showing how starved the 2x1Ghz G4 already is!
Take care,
terry
Re: serious question...
But again, this really isn't something I know all that much about.
FWIW
WM
I think one reason the G5 doesn't suffer from having such a long pipeline (which is still actually shorter than the P4's AFAIK) is that it has exceptional branch prediction logic. If I just made a fool of myself by using the wrong terms, well, you're really not asking the right person about this kind of stuff. All I can say is, read the ArsTechnica articles about the 970 (which I mostly haven't read) and wait until we get USEFUL, ACCURATE BENCHMARKS (of which there are none at this point because no one's tested Photoshop on the G5 with the optimization update thingy). Then we'll talk.
But again, this really isn't something I know all that much about.FWIW
WM
Re: Re: serious question...
Yes, your absolutely right, while the G5 will suffer from a greater branch mispredict penalty relative to the G4, it's 16000 entry Branch History Table/Global Predictor Table/ Selector Table gives it far superior branch prediction. As I've shown in a table from my previous post in this thread:
Pipeline Stages:
G4: 7 stages
K7: 10 stages
G5: 16 stages
P4: 20 stages
Branch History Table:
G4: 2048 entires
K7: 2048 entries
P4: 4096 entries
G5:16000 entries (!)
Average Hitrate:
G4: 93% (?)
K7: 93%
P4: 96%
G5: 97%+
Penalty Estimations:
G4: (.07*7= .49)
K7: (.07*10=.7)
P4: (.04*20)= .8)
G5: (.03*16)= .48) or with a 98% Hitrate (.02*16)=.32)
Most likely the G5 will suffer even less from branch mispredicts than the G4.
Of course, Apple marketing didn't mention anything about branch mispredicts, their statement went something like this:
"The fewer the steps, the shorter and more efficient the pipeline. Thanks to its efficient 7-stage design (versus 20 stages for the Pentium 4 processor) the G4 processor can accomplish a task with 13 fewer steps than the PC. You do the math.
Which is to say the least, quite humorous.
Originally posted by WM.
I think one reason the G5 doesn't suffer from having such a long pipeline (which is still actually shorter than the P4's AFAIK) is that it has exceptional branch prediction logic. If I just made a fool of myself by using the wrong terms, well, you're really not asking the right person about this kind of stuff. All I can say is, read the ArsTechnica articles about the 970 (which I mostly haven't read) and wait until we get USEFUL, ACCURATE BENCHMARKS (of which there are none at this point because no one's tested Photoshop on the G5 with the optimization update thingy). Then we'll talk.
FWIW
WM
Yes, your absolutely right, while the G5 will suffer from a greater branch mispredict penalty relative to the G4, it's 16000 entry Branch History Table/Global Predictor Table/ Selector Table gives it far superior branch prediction. As I've shown in a table from my previous post in this thread:
Pipeline Stages:
G4: 7 stages
K7: 10 stages
G5: 16 stages
P4: 20 stages
Branch History Table:
G4: 2048 entires
K7: 2048 entries
P4: 4096 entries
G5:16000 entries (!)
Average Hitrate:
G4: 93% (?)
K7: 93%
P4: 96%
G5: 97%+
Penalty Estimations:
G4: (.07*7= .49)
K7: (.07*10=.7)
P4: (.04*20)= .8)
G5: (.03*16)= .48) or with a 98% Hitrate (.02*16)=.32)
Most likely the G5 will suffer even less from branch mispredicts than the G4.
Of course, Apple marketing didn't mention anything about branch mispredicts, their statement went something like this:
"The fewer the steps, the shorter and more efficient the pipeline. Thanks to its efficient 7-stage design (versus 20 stages for the Pentium 4 processor) the G4 processor can accomplish a task with 13 fewer steps than the PC. You do the math.
Which is to say the least, quite humorous.
Well yes I think we agree to a certain point here. The issue is that there will be little incentive for many developers to produce optimized G5 code when Apple is still selling G4 and G3 PC's. I can see the majority of the developers selecting optimizations that perform well on the entire processors base. The only vendors that will be generating 970 only code are those in the performance driven markets such as video and image processing.
While I really hate to put to much emphasis on the early bench marks floating around the net, I still believe that we will see a mix bag on existing code. Some reports seem to verify this. Support of existing code is very important especially in an economy in reccession, this is probally the 970's biggest flaw and also its best success.
As far as faster goes I think Apple has missed the boat here. A machine like the G5 deserves at least one or two models with high performance GPU's. It really boggles the mind to see that largest GPU memeory allotment is 64MB. With so much of the graphics, from the OS level, be processed on the GPU it would seem to me that maxing out the video memory would be the thing to do on the high end machines.
I've read Hannibles write up it is very interesting. The problem is that VMX can choke on existing code which is bad. At the same time VMX is providing rather remarkable compatability so I geuss one should not complain to much.
I've heard much in the way of rumors about the enhanced VMX unit and VMX2. I must say this recent news gives me hope that PPC will ba around for awhile.
Thanks
Dave
Hi mim
While I'd have to think that here is some cost to an expansion slot, I wouldn't call it expensive. Just look at the expense of putting all of those holes into the G5! The reason to have a external drive slot is so that you can take advantage of new technology in 2 to 3 years. Not everybody goes wild over the latest graphics card, its also a mistake to assume that a drive slot will be used for a new optical drive.
Firewire is great technology, but the best place to add permanent technology to your computer is inside the case. To be honest a PCMCIA slot at the front of the machine could do wonders for expandability.
Apple needs to leverage firewire and every other technology built into the G5's. Its a shame they don't put more emphasise on the possibilities that FW offers the public. As to the processor upgrades it will be very interesting to see what happens with these. I would imagine with the case design of the G5 that one could move forward quite a bit with plug in processor upgrades. That is if Apple shares with the upgrade companies. With the case the way it is though these upgrades should have no impact on your graphics card nor vs versa. That is one of the good design features of the G5 case.
Dave
While I'd have to think that here is some cost to an expansion slot, I wouldn't call it expensive. Just look at the expense of putting all of those holes into the G5! The reason to have a external drive slot is so that you can take advantage of new technology in 2 to 3 years. Not everybody goes wild over the latest graphics card, its also a mistake to assume that a drive slot will be used for a new optical drive.
Firewire is great technology, but the best place to add permanent technology to your computer is inside the case. To be honest a PCMCIA slot at the front of the machine could do wonders for expandability.
Apple needs to leverage firewire and every other technology built into the G5's. Its a shame they don't put more emphasise on the possibilities that FW offers the public. As to the processor upgrades it will be very interesting to see what happens with these. I would imagine with the case design of the G5 that one could move forward quite a bit with plug in processor upgrades. That is if Apple shares with the upgrade companies. With the case the way it is though these upgrades should have no impact on your graphics card nor vs versa. That is one of the good design features of the G5 case.
Dave
Originally posted by mim
I question the need for the internal expansion slots. They're expensive to add, and will increase the heat load on the inside of the case. This may not be an issue now, but if this case is to last you 2 or 3 years then it may become a problem (esp. with a super hot running graphic card upgrade + 2 more 10000rpm drives
I also think that you'll get the same speed out of external FW800 devices as you would plugging them into the internal connections. Maybe slightly higher latency...but then you could just swap the new and old drives around.
I read recently that FW800 external drives were getting close to the theoretical maximum read/write speed of the fastest available drive (I'll look for the link).
Personally I think it's no bad thing for Apple to leaverage FW800 a bit more by reducing the number of bays inside the case - especially when it allows for the real crux of "life extentions"... frying hot processor upgrades.
A thing about the benchmarks.
IIRC, Xbench hasn't been optimised in any way for these benchmarks. Now, they did update Xbench recently, but that was after the benchmarks. And as from Macrumors report, the only difference was that it wasn't using the vec_dst instruction. Although he clearly states that the G5s take big performance hit from the use of that. So you can add a few points just on that.
But here's the big issue with the Xbench benchmarks.
IIRC, the G5 has two FPUs, the G4 has one. An un-optimised app would only take advantage of one FPU, like the G4. An optimised app, like Photoshop, would run the FPUs in parallel, effectively doubling FP performance. So if you're not benchmarking using Photoshop, you're not gonna get anywhere near the optimal FP performance. To my knowledge, neither Cinebench or Xbench uses both FPUs. I might be wrong, but I haven't heard anything about it.
In short: Wait for the Photoshop benchmarks, then compare that to the old G4 Photoshop benchmarks. That way you'll get a good comparison. These are pretty much useless.
IIRC, Xbench hasn't been optimised in any way for these benchmarks. Now, they did update Xbench recently, but that was after the benchmarks. And as from Macrumors report, the only difference was that it wasn't using the vec_dst instruction. Although he clearly states that the G5s take big performance hit from the use of that. So you can add a few points just on that.
But here's the big issue with the Xbench benchmarks.
IIRC, the G5 has two FPUs, the G4 has one. An un-optimised app would only take advantage of one FPU, like the G4. An optimised app, like Photoshop, would run the FPUs in parallel, effectively doubling FP performance. So if you're not benchmarking using Photoshop, you're not gonna get anywhere near the optimal FP performance. To my knowledge, neither Cinebench or Xbench uses both FPUs. I might be wrong, but I haven't heard anything about it.
In short: Wait for the Photoshop benchmarks, then compare that to the old G4 Photoshop benchmarks. That way you'll get a good comparison. These are pretty much useless.
Careful now, the G5 can use it's dual FPUs in any app, no software can prevent it from doing so. Remember, it's not software that finds independent instructions that can be executed in parallel, thats the core's job!
Having dual FPUs doesn't automatically mean double the FPU performance, dependent instructions, consecutive load-stores, latency and memory accesses can all lower the actual IPC. This is why we don't see the Athlon, with it's triple FPUs, triple ALUs, and triple decoders, wipe the floor with other comparable chips; there are only "bursty" moments where the Athlon can actually execute 3 instructions/cycle.
Now the G5 will be much better at getting ILP out of code than the Athlon since:
1) It has a 215 entry instruction buffer (compared to the Athlons 72), allowing it to fill larger cycle gaps in each L1-cache access with other independent instructions. (principle of OOOE).
2) The code that it will be running will typically contain more ILP than x86 code, this includes much fewer load-stores.
3) The G5 has much faster memory access and lower latency than the Athlon. It won't have to stall for as many cycles with a L1/L2 cache miss, and it's won't have to spend as much time waiting to be fed new data (from the memory).
Despite all this, don't expect it to use the full power of it's dual FPUs all the time, even running code with high amounts of ILP, typical CPUs with the above charecteristics will only be able to utlize all it's execution slots around 60% of the time.
The ATI 9800 Pro video card is available in 128 MB form as a BTO option on all the G5s. This is arguably the best consumer/semi-professional GPU on the market today.
However, I believe that OSX's use of OpenGL (Quart Extreme) alone is not going to max out the capabilitites of the 9800, not by a long shot. QE has to run on machines with much slower graphics hardware (iMacs, eMacs, etc). So the performance demands should be fairly limited, from the OS.
Games and 3D apps, on the other hand, will kick some serious butt with the 9800.
Yeah, I was a bit optimistic there with the doubling
Still, in apps like Photoshop, which are the ones many of us care about, FPU performance is vital, and when a benchmark is made where it only uses one FPU you'll get no where near the actual performance peak.
Or did I mess up and any code run on the G5 uses both? I'm a bit uncertain about this.
Meh... I'll wait for the photoshop benches.
Still, in apps like Photoshop, which are the ones many of us care about, FPU performance is vital, and when a benchmark is made where it only uses one FPU you'll get no where near the actual performance peak.
Or did I mess up and any code run on the G5 uses both? I'm a bit uncertain about this.
Meh... I'll wait for the photoshop benches.
Originally posted by jettredmont
Two cables and 2-3 screws, once you flip open the side of the box (and make sure you are grounded/static-free!). Not as easy as plugging in new RAM, but certainly not brain surgery either.
Replacing an optical drive is very easy to do, as there are about three steps involved, and you "undo" them to remove the old drive, then "redo" them the other way around to put the new one in.
My father's replaced his own CD drive (on a Windows box, even!). That would tell you how easy it is if you knew my father and electronics
Definitely sounds easy enough, but wouldn't this negate the Apple warrenty?
of course not adding ram and drives and cards do not violate apples warranty on powermacs at least, thats why they made them open for expansion, thats why they give you a pdf on there site with the correct way to do it. now if you do it incorrectly with out being gronded etc. then you might be at risk
Originally posted by Shrike_Priest
Yeah, I was a bit optimistic there with the doubling
Still, in apps like Photoshop, which are the ones many of us care about, FPU performance is vital, and when a benchmark is made where it only uses one FPU you'll get no where near the actual performance peak.
Or did I mess up and any code run on the G5 uses both? I'm a bit uncertain about this.
Meh... I'll wait for the photoshop benches.
Read the first paragraph of my original response to you again.
As long as the code contains instructions that can be executed in parallel (on most programs this is a given), it will benefit from having multiple execution units.
Barefeats benchmarks the performance of DDR vs. SDR Powermacs which are limited by SDR processor busses. This is NOT an indication of the performance difference between the SDR standard and the DDR standard.
Going over the posts a bit more, I've noticed that this has been pointed out to you a number of times but you still persist in this stance.
Your argument is essentially the same as saying, 'a two inch pipe won't move any more water at the same pressure than a 1 inch pipe...' but for comparison you are comparing a 2 inch pipe that is hooked up to a one inch source pipe vs. a one inch pipe. The DDR on a G4 system can never perform up to its full potential because it is faster than the rest of the system. The DDR on the G4 is NOT the limiting factor.
Well, you could put an ATA card in the machine. You would have to work a bit to route cables up to the top of the case but I'm sure it could be done. If you don't mind a kludge, you could also put the drives in the bottom of the case (for the single processor machines)
I think Apple produced a machine without compromise. If you need more drive space, Apple's answer is to buy more and move your data to the nice big SATA drives, rather than adding an additional ATA bus and adding to the production costs.
I'm not saying that there aren't addressing issues with 256MB cards (because I don't know) but this would seem odd since you would only need 32bit address space to directly access all of the bits in 256MB of ram.
Anyway, from what I've seen, the main cause of the speed disparity between high ram vid cards and higher ram vid cards is that the manufacturers tend to put slightly slower (and much cheaper) ram on the very high ram vid cards. This is certainly the case with the GF4 line. The lower ram cards are always marginally faster unless you benchmark them with HUGE textures. Rumor has it that Doom 3 will use up to 80 MB of texture in a scene so those 128 MB vid cards might actually pull ahead.
ISA is nearly twice the size of a PCI card. The connectors on the blade were much larger.
This is a 16 bit ISA (not EISA) card.
EISA is even larger.
Here is an overview of ISA and EISA card connectors that might help...
http://members.iweb.net.au/~pstorr/pcbook/showtell/show6.htm
I have to respectfully disagree that EISA was found on the majority of PCs.
I've been supporting PCs and Macs (professionally) for almost a decade (supporting lots of legacy hardware) and it has been my experience that it's actually unusual to find EISA slots in PCs.
This is what Techfest.com has to say on a page decribing the EISA technology... "The EISA Bus originated in 1988 & 1989. It was developed by the so called "Gang of Nine" (AST, Compaq, Epson, Hewlett-Packard, NEC, Olivetti,Tandy, Wyse and Zenith) as an alternative to IBM's "patented" Micro Channel bus. It received limited use in 386 and 486 based Personal Computersthrough about 1995 before being obsoleted by the PCI bus as Pentium based systems were introduced."
.. "received limited use"...
In fact, a quick search for EISA ISA on google provided me with links to EISA data structures and Digital Unix... over and over. Not much info for the PC. A few FDDI and ethernet card links, but very few.
It just hasn't been my experience that EISA was ever a pervasive technology. Most of the EISA Machines I've run across were PC Servers, specifically machines that would compete with IBM's microchannel based PC servers.
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