AMD is supposed to have a new set of Opterons in the 2.4 GHz range available in a month or two. I don't know what Intel is doing, but AMD has a fairly aggressive roadmap for their AMD64 chipsets and processors. From a pure performance standpoint, the AMD64 chips are the biggest competitor to the PPC970 (and future) chips, and the AMD chips are somewhat faster in the general case. Unless you are running an application that can really use Altivec (and most can't), the Opterons are generally a bit faster than the PPC970s. We have huge mostly integer codes that run insanely fast on Opterons, though that doesn't keep us from using MacOS X workstations. An Opteron with Altivec (instead of the not as nice SSE2) would be untouchable. The real loser in all this is Intel. The Opteron is a wicked good chip, and clock for clock does very well against the PPC970. The Itanium is going the way of a the i860 as far as I can tell.
First things first, that AMD at 2.4 is not likely to surface until January or Febuary at the earliest. Reason being that AMD currently have absolutely no need to release a faster clocked speed opteron, the current 2GHz version blows the pants off the Xeon equivalent.
I do completely disagree with the comment about the opteron being equal or nearly more powerful per clock than the G5. Realise, that the Opteron is running completely optimized code at the moment. The opteron is essentially your Athlon XP with on die memory controller and SSE2 and x86-64 , its fpu and integer units remail completely unchanged from the Athlon XP as does the vast majority of its architecture. As things go presently it is running at optimal situation in 32 bit mode. Code already is compiled with Athlon in mind, in other words Athlon 64 takes automatic advantage of, and it can take advantage of SSE2 optimizations in Pentium 4 optimized code.
Now, here we have the G5, completely radical departure from the G4, shares bugger all in common with it bar the Altivec unit, still very different to unit found on G4. What a LOT of people keep forgetting is that current 32 bit mode results for Athon 64 or Opteron is as good as it gets in 32 bit mode, you won't eek out much more performance improvement from current results. Even GCC generates great code for Athlon 64 since its based on Athlon, it can also autovectorise SSE2 intructions. Which gives an automatic perf boost when applicable.
G5, on the other hand is so new that current GCC compiler does not in ANY way work the processor at full potential. It breaks from prior PPC design in such a way that current code we see is only using chip at probably 50% efficiency. GCC isn't great in any way shape or form at parallelising code to work the dual int, dual fpu units in parallel. Essentially GCC 3.3 in most cases only works the chip at 50% of its peek theoretical performance. This has been discussed to death in arstechnica forums and i keep mentioning it here
. So baring in mind that we have a processor that is neck and neck with Opteron of same GHz, running at peak performance in 32 bit mode, would suggest to me that the 970 is a far superior performing chip. It was designed to be from the start.
Ok how do i back this up.....
Now IBM has released a compiler that generates "proper" code for the G5 / 970 / Power 4 and that works the different units in parallel. Results as i keep saying in tests done independently by people like you me and joe bloggs have shown that it does generate nearly 200% faster results and 300% faster results in some cases even by a simple recompile. Also be aware that Altivec is not used in abundance at the moment, bar apple developed applications. IBM have already stated that this compiler is very early and still in beta. They are working with Apple to improve GCC also to get GCC to work the dual units that are currently being squandered. Furthermore the compiler doesn't work with all apple code at the moment but IBM have already stated that this situation will improve. With regard to Altivec IBM are planning that the next revision of this compiler will be capable of autovectorising for Alitvec like the GCC currently does for AMD and Intel processors. This would provide a MASSIVE performance improvement alone in a lot of programs.
Now consider that the Power 4 at 1.5 GHz currently has much much higher SPEC int and SPEC float results that dwarf the Opteron and Xeon. Now consider that a 970 should be achieving results similar at the same GHz, obviously slightly less because of the difference in cache sizes and lack of L3 cache... but not the massive difference that there currently is between 1.5 power 4 and 2 Ghz 970. As far as i know the Power 4 was run with an older version of IBM's XLC and XLF. This would most likely account for the fact that there is such a gulf in performance between the Power 4 at 1.5 and the 2Ghz 970 which is essentiall the Power 4 with less cache and multi core functionality removed with the addition of Alitvec.
Now..... what will be interesting.... IBM are releasing their own 970 Blades soon as already mentioned on the front page of this site. They will be running at up to 2.5 Ghz. More than likely they will use a similar motherboard to that found on the current Apple G5. However you can bet your bottom dollar that they won't make the same dumb mistake as apple and will compile their SPEC results with the proper compiler which won't cripple the chip as current GCC does, even in its "optimized" version.
It will make apple look really incompetant if they have a 2GHz G5 and IBM have a 2GHz 970 Blade and the spec int and fpus scores of the blade blow the G5 out of the water because they are using a compatible compiler.
I reckon that what Apple need to do more than anything to keep in the performance race is to adopt the IBM compiler and recompile their SPEC results to actually do themselves a favour. Whats the point in having a fantastic chip, fantastic technology if you don't take advantage of it....
Only thing that does sound good is that apparantly IBM are concerned also with the way GCC produces current G5 executable code and they are working with Apple at heavy optimization of the compiler and at getting GCC to autovectorise as well.
Source for all this info and arguments... good folks over at arstechnica forums.
For those of you here with a dual G5 and a dual Opteron.... i suggest you go over to ars forum and get the IBM compiler.... give yourself a nice surprise and watch the huge performance you get when you recompile. I already tried doing a few tests myself on a mates dual G5 with XLF -O5 , and a dual 246 Opteron with ICC 7.1 (funny the intel compiler generates the fastest code for this) at work.(g5 configured with 1 gig ram, opteron configured with 2 gig ram) Easily the G5 / 970 ate the opteron for lunch in a lot of cases twice as fast if not more and this was without any vectorisation in the code, just raw FPU and raw int power doing Math functions for cryptology. Its a math routine that does a run with integer based keys and then with floating based keys. When the same code was compiled with GCC and compared with the Opteron running ICC at highest optimization level the Opteron was marginally faster. But as already mentioned the 970 ate it for breakfast even in integer (which really surprised us) by a large margin and destroyed it in floating point scaler, when the same identical code was recompiled with XLC and XLF.
Why dont a few other guys here try this out and see what you find out
and see if it works for some of you as well as it turned out when i tested!
As for Apple needing a speed boost, hell no... i reckon AMD and INTEL need incredible speed boosts if they even want to stay in the same ballpark as this chip when its running XLC or XLF compiled code and actually running code with a compiler which can compile code that is compatible with its design.....
