Different Apple Silicon Macs support different number of displays:
https://forums.macrumors.com/threads/multiple-displays.2409806/post-32694660
Hubs are not so passive. They have to look at the packets coming in and decide where they go. Passive would be like a coax splitter for connecting two TVs to the same cable output.
A USB4 v2 or Thunderbolt 5 hub would not be able to get the 80 Gbps asymmetric mode from existing Macs which only support 40 Gbps.
macOS only reports the color depth of the framebuffer. To see the color depth being output to the display, you need to get that info from the onscreen menu of the display or from a utility like AllRez or AGDCDiagnose. I don't know how to get that info for Apple Silicon Macs though; ioreg will give a list of color modes for each display mode but it doesn't show which color mode is currently being used.
Too bad most displays don't show current pixel depth.
I don't know if dithering happens when outputting a 10bpc framebuffer to a 8bpc display.
I know dithering in the framebuffer can happen if the framebuffer is 8bpc but this is up to the app (or API) doing the drawing into the framebuffer.
LG UltraFine 5K works from Macs that don't support HBR3. It always counted as two displays on Intel Macs when doing 5K60 because it uses two HBR2 x4 connections. It doesn't have an HBR3 mode. It's like the Dell UP2715K except the LG UltraFine 5K uses Thunderbolt to connect the two DisplayPort connections.
Apple Silicon Macs are weird because they treat dual tile displays as one display. An M1 Mac supports one display from Thunderbolt but can have two DisplayPort connections where the second DisplayPort connection can only be used by the second tile of a dual tile display. I wonder if Asahi linux could somehow create a second display from the second DisplayPort connection? It might be limited to being equal in size/timing of the display connected to the first DisplayPort connection.
The XDR supports:
- dual tile 6K60 for GPUs that support HBR3 but not DSC. This is the only mode of the XDR that uses HBR3.
- single tile 6K60 for GPUs like Navi, RTX, Apple Silicon that support DSC.
- dual tile 5K60 for GPUs that don't support DSC.
- single tile 5K60 for GPUs that support DSC. Also, maybe 6bpc which doesn't require DSC. macOS doesn't support 6bpc.
- single tile 4K60, 1440p, etc.
The bandwidth limit of the interface is HBR3 x4 for each port. External factors such as cables, adapters, hubs, and docks can reduce that limit. Different GPUs have different number of ports. However, a GPU having n ports capable of HBR3 x4 bandwidth doesn't necessarily mean it can use all of them at full bandwidth even after ignoring external factors. There are internal factors that limit the bandwidth of a port. For example, a certain older Intel or Nvidia GPU supports HBR2 x4 but can't do more than 540 MHz of pixels even though it should allow 720MHz (for 8bpc) or 576MHz (for 10bpc).
A GPU can only do so much work. Compression for DSC? Scaling for scaled modes? Converting pixels to output? Some of these processes might reduce the number of displays that can be connected. I don't know which.
If a GPU has a clock of x MHz, but needs to output pixels > x MHz, then it has to do a parallel task using a second something. There's a limited number of these somethings.
DSC splits a framebuffer into columns called slices. A display tells the GPU how many slices it supports, how wide they can be, and how many pixels/second each slice can accept. I suppose each slice is compressed separately and could be a separate task done in parallel. A GPU supports a certain number of slices and slice widths. The intersection of the GPU and display capabilities determines the display modes that can be used. This has been true since analog CRTs.
