Alright, just to take some heat off 6’1s.
What do you guys think of this new standard ? It is touted as an alternative to the slow development of the PCI-e standard.
http://genzconsortium.org/faq/gen-z-overview/
Gen-Z isn't really a pure alternative to PCI-e. PCI-e 4 and 5 are suppose to make the more general data transfer more suitable for more specialized work. There is overlap but it is just one of three high speed, low latency, "Open" interconnects that are in play. CCIX , Gen-Z , and OpenCAPI . Each of these has a different focus, but also overlap.
There is an overview from back in 2016 when OpenCAPI jumped in.
https://www.theregister.co.uk/2016/10/14/opencapi_declaration_of_interconect_war/
OpenCAPI -- a derivative of IBM standard that they worked into the Power CPU roadmap. NVLink isn't the same but isn't completely different either. [ a processor to processor link. ]. Primarily inside the same system box processor to accelerator design. Package-to-Package.
Gen-Z -- memory backplane which abstracts away some aspects of memory physical. Shared memory clusters. To some extent as competitor to Infiniband as much as PCI-e.
CCIX -- cache coherency for CPU cores and other processors.
AMD is on all three in somewhat of a "bet on everything not Intel" strategy. Intel bought up Cray's supercomputer interconnect ( Aries ) which has echos in t he Omni-Path that has come with the latest Xeon SP processors. The bet on all of these are indicative though of why AMD has moved on from Crossfire.
All of this is generally pushing to having a flatter, spread out memory address space. ( not uniform but cache coherence.... all data consumers working off the "same page" . You get rid of duplication copying to get work done. )
I found this quote interesting :
“
- Gen-Z abstracts memory media from the memory controller to enable the industry to deploy a wide range of memory media without waiting for the industry to move in lock step. This enables new media types or multiple generations of a given media type to be transparently supported in any solution. It also enables customers to independently replace and upgrade components based on their needs— e.g., processors, memory modules, NVM modules, etc.‘
Seems like Dell, HP, ARM and AMD are in + others. Intel and Nvidia are absent. Apple isn’t mentioned.
Graphic from back in 2016...
https://www.anandtech.com/show/10751/gen-z-consortium-formed-developing-a-new-memory-interconnect
or more recently
"... At the SuperComputing17 conference in November, Gen-Z had a multi-vendor demo of four servers sharing access to two pools of memory through a Gen-Z switch. This was implemented with heavy use of FPGAs, but with the Core Specification 1.0 release we will start seeing Gen-Z show up in ASICs. The focus for now is on datacenter use cases with products potentially hitting the market in 2019. ..."
https://www.anandtech.com/show/12431/genz-interconnect-core-specification-10-published
Additionally, if look here some of the notion is offloading from PCI-e some of this non-volatile memory traffic.
https://www.nextplatform.com/2017/09/05/future-interconnects-gen-z-stitches-memory-fabric/
Think moving the Optane persistent storage or the SSD backing store of a GPU card (that AMD has implemented ) off to a separate bus.
Both Intel and Apple are absent from all of these. Apple isn't so much of a big deal since ARM is somewhat of a proxy for Apple in these respect. if ARM puts CCIX support into the general architecture of ARM designs then Apple as a ARM arch implementor will pick it up. Honestly, it would probably help if Apple spent some money on some sponsorships directly; it isn't like they are extremely cash poor.
If Apple is using Intel Xeon W as a core baseline for implementation this probably has little to do with an upcoming Mac Pro. Apple isn't likely building specialized computer cluster components.
There is some overlap in the internal bus that Apple is using in there ARM implementations but that has extremely little overlap with the Mac Pro ( Mac Pro probably gets a T2 like chip but bus is entirely encapsulated so no system wide impact. )