The wonders of the powers of 2.Can you elaborate on this? Why would the size of the chip have any determination on changes to the memory controller.
Asked another way, how can you determine from a technical standpoint what changes were made to the memory controller hardware from just the chips that talk to it?
You have 2 RAM chips on the SoC. 8x 16-bit CH is then split into 2x 64-bit CH from the memory controller to each RAM chip.
8 GB - 2x4 GB with each getting RAM chip a 64-bit connection
16 GB - 2x8 GB with each RAM chip getting a 64-bit connection
24 GB - 2x16 GB with each RAM chip getting a 64-bit connection (some sort of hardware/software block so you can not address the full 32 GB only 24 GB)
Or...
24 GB - 1x16 GB + 1x8 GB with each RAM chip getting a 64-bit connection