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While the A14 Bionic chip in iPhone 12 models was the first chip in the smartphone industry to be manufactured based on a 5nm process, Apple and its chipmaking partner TSMC are reportedly pushing ahead on even smaller nodes.

a14-bionic-chip-video.jpg

Taiwanese research firm TrendForce today reported that Apple plans to use TSMC's next-generation 5nm+ process for the A15 chip in 2021 iPhones. TSMC's website says the 5nm+ process, which it refers to as N5P, is the "performance-enhanced version" of its 5nm process that will deliver additional power efficiency and performance improvements.

Looking farther ahead, TrendForce believes it is highly likely that the A16 chip in 2022 iPhones will be manufactured based on TSMC's future 4nm process, paving the way for further improvements to performance, power efficiency, and density.

These continued process advancements should result in future iPhones continuing to provide industry-leading performance among smartphones, while the power efficiency gains could contribute to longer battery life. And considering that TSMC also manufactures Apple Silicon chips, including the 5nm-based M1 chip, these process advancements will likely extend to Apple's chips in future Macs — perhaps an "M1X" or "M2" chip or so forth.

Rumors suggest that future Apple Silicon Macs will include new 14-inch and 16-inch MacBook Pro models with an all-new form factor as early as Q2 2021, in addition to a redesigned 24-inch iMac and a smaller version of the Mac Pro.

Article Link: Apple Expected to Use TSMC's Advanced 5nm+ and 4nm Technologies for Future iPhone Chips, Likely Macs Too
 
I wonder if the mid or upper tier M-chip is waiting on the 5P node. Throwing all the gains into performance would mean a nice bump up from M1 single-core and of course, more cores overall. Exciting times!
 
I’m curious, how far can they go with shrinking nodes? Is sub-nanometer a thing? If it isn’t, how does the industry move on from silicon?
Gallium Nitride is the next likely material. It’s already being used instead of silicon for chargers. That’s why companies like Anker can release 30W chargers the same size as Apple’s 5W charger.
 
I remember many years ago, when maybe they where at 120nm, that the physical limit was supposed to be around 8-10nm. I don't know what to believe today. A silicon atom is 0.2 nm.
It’s probably no accident that Intel ran into issues going to 10nm. TSMC might hit a wall at 4nm for all we know. At some point the laws of physics override Moore’s Law.
 
It’s probably no accident that Intel ran into issues going to 10nm. TSMC might hit a wall at 4nm for all we know. At some point the laws of physics override Moore’s Law.
Intel also gave up years ago: https://www.technologyreview.com/20...dmit-transistors-are-about-to-stop-shrinking/

Attitudes like that are part of why Apple switched to their own processors.

What’s interesting is AMD was part of this group saying that by 2021 it wasn’t worth the costs to go smaller. Well, TSMC is still going smaller (as is AMD...Intel pretends they still are).
 
Was to be expected. There's no other company that's as advanced as TSMC.

Even Intel will start using TSMC's foundries soon.
Intel already use TSMC today, just not for its CPUs and they will not go to a foundry for their x86 CPUs, regardless what the CEO said
 
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Other analysts have speculated Apple will be using TSMC's 3nm process by late 2022 (expects to into high volume manufacturing in 2H 2022 even with covid delays.)

Haven't heard anyone speculate on 4nm until now. Interesting!
 
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M2: 4nm process, 8 Firestorm cores at 3.8Ghz, 32GB LPDDR5 memory.

I'll come back here in a year to see if this prediction holds up.
 
Also: N5P offers 5% performance enhancement and 10% power enhancement over N5, so not a very big difference. Apple likes to make larger architectural changes during those off years, though.
 
This is revolutionary. The reason 5 nm took so long is because traditional 193 nm ArFi DUV lithography (the process by which light is used to pattern wafers using photoresist) needed multiple patterning to achieve 10 nm. Now that EUV, which has been in development by ASML for over 25 years is finally ready, we can finally scale down to sub 7 nm, without the need for multiple patterning. Even more exciting is when ASML will release their high-NA EUV tools next year, we'll be seeing bigger jumps and node shrinks.

ASML is one of the most important companies on planet earth now, and few even know it exists.
 
I’m curious, how far can they go with shrinking nodes? Is sub-nanometer a thing? If it isn’t, how does the industry move on from silicon?

Yes, they can go sub-nanometer. They can keep going until quantum effects prevent the ability to shut of the transistor gate. As they get smaller they will modify the gate geometries (which they’ve already done once, when they moved to FINFETs instead of MOSFETs) in order to provide a stronger electrical field to shut off the gate. At some point they may have to go to vertical transistors, like bipolar devices, where the layer thicknesses are the critical dimensions (since those are easier to control). At the point where they can finally go no further, they may have to switch to semiconductors with heterojunctions (e.g. GaAs or InP) in order to increase carrier mobility without shrinking the gates further. Or they can use bandgap engineering with silicon (which already occurs - most process now use germanium to modify the bandgap).

It will be quite awhile before things hit a dead end.
 
It’s probably no accident that Intel ran into issues going to 10nm. TSMC might hit a wall at 4nm for all we know. At some point the laws of physics override Moore’s Law.

In 1992 my ph.d advisor told me we were about to hit the end of Moore’s Law, so I should research CML circuits and BJT devices and create a CPU using them. Which I did.

Hasn’t been a year since then when I haven’t read lots of people claiming we are about to hit a wall.
 
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