notjustjay said:If 90nm isn't working out, why would 45 be any better?
Isn't that kinda like saying "Well, we've been having trouble fitting 9 clowns into this Volkswagen, but don't worry, we're working on getting 15 in there now"?
Dippo said:Doesn't 65nm come after 90nm.
manthas said:I don't even want to think how hot these things will get. I just hope they come up with a good way to dissipate the heat...I mean other than liquid cooling!
I hardly think 45nm processors will be used in computers.ksz said:This thread is misleading people into believing in a chain of events that is not necessarily newsworthy for impatient Macintosh fans (myself included). First, IBM is not jumping over the 65nm process. The industry is going to embrace 65nm for the next 2-4 years. The advanced fabs are just ramping up on 65nm and there remain a number of systematic problems to be worked out. The 90nm process is currently the most advanced *volume* production process and hence 65nm is considered to be N+1 technology while 45nm is N+2. At any given time the semiconductor industry is working on the N+1 and N+2 generations. At this time, 45nm is still in early R&D stage. New materials (such as low-k dielectrics for interlevel oxides and high-k for gate oxides) are being developed and tested, and even new transistor designs such as the double-gated FinFET are being studied. Historically, R&D costs for each subsequent technology node have doubled. With 45nm, the R&D cost may be prohibitive for any one company to shoulder, and hence the semiconductor industry has formed a consortium called IMEC that is based in Belgium. The idea is to share R&D costs starting with 45nm.
This announcement from IBM highlights one of the earliest and potentially most expensive and thorny problems with 45nm, namely immersion lithography. It works like this:
1. The wavelength of light used to expose the reticle is still 193nm. Several years ago, feature sizes (such as metal line widths and spacings) were 0.25 microns wide (250nm). This is safely above the stepper wavelength (193nm) and allows the pattern to be printed or exposed on the wafer surface quite easily.
2. Since the 180nm technology node, the feature size has fallen BELOW the stepper wavelength. How can a 193nm wavelength of light expose gaps and widths that are 180nm wide? The laws of optics tell us that in order to resolve or "see" a gap of X nm in width, we must use a wavelength of light that is itself LESS than X nm in width. Today's feature sizes are down to 65nm and are still being printed with 193nm light! This seeming violation of the laws of physics and optics is being achieved by very clever techniques generally known as RET or Resolution Enhancement Techniques. Since the 180nm technology node, RET has been growing in cost and complexity from simple OPC (optical proximity correction) to PSM (phase shift mask) to the combination of OPC plus PSM, and now on to SRAF (sub-resolution assist features) which is ushering in a new category of RET called X-RET or Extreme-RET. The industry could have reduced the stepper wavelength from 193nm to 154nm, but a detailed analysis showed that simply shortening the stepper wavelength would be cost-prohibitive! Instead, use of 193nm has been extended to the 45nm technology node, but the gap between 193nm and 45nm is quite large and cannot be completely resolved even by the most advanced RET.
3. Fortunately, something called Immersion Lithography has been introduced. It has been tried before with mixed results, but the need for it has never been as urgent as it is now. By immersing the wafer in water, one can reduce the effective numerical aperture (NA), allowing 193nm light to act as if it were a shorter wavelength. The wafer now has to be immersed in water, however, and this creates new challenges for new types of resist and topcoat materials that can withstand the effects of water contamination. Today, however, standard dry resist materials are being tested with wet immersion lithography, and this is leading to problems such as resist bubbles. While this problem can be controlled, it requires slowing down the stepper, which is hardly an acceptable solution for high-volume production. Hence, new resist materials are being developed, and it seems to me that IBM's partnership with Toppan is specifically aimed at the development of new photomask materials (wet photo resist and topcoat, for example).
Hence, this announcement is not especially newsworthy to Macintosh fans. It does not say anything about a new PowerPC chip on 45nm, only that IBM -- like everyone else -- is working actively on 45nm process develoment. Will Intel transition its manufacturing line to 45nm in 2007 timeframe? Sure. Will AMD? You bet. Will Freescale? Yup.
Why?Lacero said:I hardly think 45nm processors will be used in computers.
Lacero said:I hardly think 45nm processors will be used in computers.
~Shard~ said:Sounds like we'll be seeing a G6 PowerMac in 2007...![]()
Lacero said:It gives off too much heat that no heat sink or watercooled sink can quickly draw away. Especially if you reach +3Ghz speeds and hundreds of millions of transistors. They only go to 45nm to save money on wafers.
If all else remained the same and we only scaled geometry down from 65nm to 45nm, we would increase heat density. Any savings from use of lower voltages could be masked by higher packing densities. To reduce power dissipation, new materials are required, particularly high-k gate oxides and low-k interlevel oxides, new processing techniques such as strained silicon, and new component designs such as FinFETs (and Germanium FinFETs), carbon nanotubes, quantum dots, and other exotic structures.Lacero said:It gives off too much heat that no heat sink or watercooled sink can quickly draw away. Especially if you reach +3Ghz speeds and hundreds of millions of transistors. They only go to 45nm to save money on wafers.
ksz said:This thread is misleading people into believing in a chain of events that is not necessarily newsworthy for impatient Macintosh fans (myself included). First, IBM is not jumping over the 65nm process. The industry is going to embrace 65nm for the next 2-4 years. The advanced fabs are just ramping up on 65nm and there remain a number of systematic problems to be worked out. The 90nm process is currently the most advanced *volume* production process and hence 65nm is considered to be N+1 technology while 45nm is N+2. At any given time the semiconductor industry is working on the N+1 and N+2 generations. At this time, 45nm is still in early R&D stage. New materials (such as low-k dielectrics for interlevel oxides and high-k for gate oxides) are being developed and tested, and even new transistor designs such as the double-gated FinFET are being studied. Historically, R&D costs for each subsequent technology node have doubled. With 45nm, the R&D cost may be prohibitive for any one company to shoulder, and hence the semiconductor industry has formed a consortium called IMEC that is based in Belgium. The idea is to share R&D costs starting with 45nm.
This announcement from IBM highlights one of the earliest and potentially most expensive and thorny problems with 45nm, namely immersion lithography. It works like this:
1. The wavelength of light used to expose the reticle is still 193nm. Several years ago, feature sizes (such as metal line widths and spacings) were 0.25 microns wide (250nm). This is safely above the stepper wavelength (193nm) and allows the pattern to be printed or exposed on the wafer surface quite easily.
2. Since the 180nm technology node, the feature size has fallen BELOW the stepper wavelength. How can a 193nm wavelength of light expose gaps and widths that are 180nm wide? The laws of optics tell us that in order to resolve or "see" a gap of X nm in width, we must use a wavelength of light that is itself LESS than X nm in width. Today's feature sizes are down to 65nm and are still being printed with 193nm light! This seeming violation of the laws of physics and optics is being achieved by very clever techniques generally known as RET or Resolution Enhancement Techniques. Since the 180nm technology node, RET has been growing in cost and complexity from simple OPC (optical proximity correction) to PSM (phase shift mask) to the combination of OPC plus PSM, and now on to SRAF (sub-resolution assist features) which is ushering in a new category of RET called X-RET or Extreme-RET. The industry could have reduced the stepper wavelength from 193nm to 154nm, but a detailed analysis showed that simply shortening the stepper wavelength would be cost-prohibitive! Instead, use of 193nm has been extended to the 45nm technology node, but the gap between 193nm and 45nm is quite large and cannot be completely resolved even by the most advanced RET.
3. Fortunately, something called Immersion Lithography has been introduced. It has been tried before with mixed results, but the need for it has never been as urgent as it is now. By immersing the wafer in water, one can reduce the effective numerical aperture (NA), allowing 193nm light to act as if it were a shorter wavelength. The wafer now has to be immersed in water, however, and this creates new challenges for new types of resist and topcoat materials that can withstand the effects of water contamination. Today, however, standard dry resist materials are being tested with wet immersion lithography, and this is leading to problems such as resist bubbles. While this problem can be controlled, it requires slowing down the stepper, which is hardly an acceptable solution for high-volume production. Hence, new resist materials are being developed, and it seems to me that IBM's partnership with Toppan is specifically aimed at the development of new photomask materials (wet photo resist and topcoat, for example).
Hence, this announcement is not especially newsworthy to Macintosh fans. It does not say anything about a new PowerPC chip on 45nm, only that IBM -- like everyone else -- is working actively on 45nm process develoment. Will Intel transition its manufacturing line to 45nm in 2007 timeframe? Sure. Will AMD? You bet. Will Freescale? Yup.
Windowlicker said:Easy now! The article states "early production by mid 2007". That certainly doesn't lead to having these on power macs until.. 2008, 2009??
stephenli said:true! where is our 3.0Ghz G5?!
Someone's trying to increase post count. Naughty, naughty.pontecorvo said:Let me be the FIRST to say, this is great news for fans of the 45-nanometer chip making process!
Huh? A new process? Where are you getting this?shooterlv said:To put it simply, IBM has developed a new process that may allow them to develop smaller and faster processors. The jump from 90nm to 45nm is irrelevent. This is an entirely new process.
Are you suggesting that IBM developed a process for 65nm, tried to make it work, decided to give up, and are now focusing that process on 45nm feature sizes? If something could not work on 65nm, why would it work on 45nm?Even if they never get the current process to work at 65nm, they obviously feel confident that the new process will work at 45.
Well of course, so would everyone else. That's my point. IBM could just as easily announce that they are working on the 30nm process, which actually they probably are, but so what? Once the new process is stable and ready for daylight, they will move whatever designs onto that process that are justified by the economics of the process and the design. This is simply common sense.While there is no mention of PPC chips in this article, I would think that IBM would definately steer towards PPC with this technology as their fastest servers are PPC based.
hcorf said:last time i checked i thought i read that as the size of the production process decreases, you then get less heat given off by the same unit running at the same speed. The main restriction on speed used to be the heat given off (which is why you can run an intel 486 chip at 2ghz if you cool it with dry ice). (and the reason why the 800mhz g4 in my ibook runs ALOT cooler than the first one that was put in the powermacs)
So going down a proccess means a 2.7ghz g5 based on the 45nm proccess would give off far less heat than the current one.
The reason they run so hot now is because all the cpu makers are running them faster than they should in order to compete with eachother.
I am probably wrong about a lot of this, could someone in know correct me here?