IBM PPC 970MP A Reality?

[relimw]

I know for a fact that the 970DP is up and running. IBM will more then likely start using this processor in a future lineup of "OpenPower", not based on the Power 5 architecture but on the 970. They need this to compete in the open space.

I understood from a "fellow" that they have crancked up the speed to 3.5 Ghz and got the thermal issues under control (read smaller packaging). They shipped a number of processors to outside parties for "integration" in November.

I expect that Apple to announce in the fall the roll-out of a 2 x Dual core G5 3.XX Ghz with support up to 64 GB of memory.

Wow... for a first post those are some mighty tall words. I'm not so sure of what you're saying but I'm pretty sure your timeline is off... we're well past an update now, shipping 4months off. I think we'll have an announcement soon.

Big news really brings 'em out of the woodwork, eh?

Of course, this could actually be true, and Apple has learned to build some stock before announcing a new topline system after the snafu with the 2.5s last year. Seems I recall some people had their 2.5s on order for like 5 months before they received them.

 

[Rincewind42]

At the same clock speed, I think it is unlikely that a single 970MP would be faster than a dual processor 970FX (as in the current dual G5 Power Macs). The problem is that the dual cores on the single 970MP will have to share the same Front Side Bus (FSB or system bus), while the dual processors in the current Power Mac G5s have independent FSB connections to the system controller and i/o. It's possible that a single 970MP could perform as well as or even slightly better under some conditions, but overall it could be a "wash" or even a modest advantage to the current dual G5s (IMO).

However this is mitigated by the larger L2 cache. Additionally the FSB is already as fast/faster than main memory so having more FSBs just means more contention for access to memory. However having two cores can also mean better use of the dual-unidirectional nature of the elastic bus. The L2 cache can service a read for one CPU while servicing a write for he other more effectively (because it will have two independent streams to work from instead of one).

As far as the competition (Intel and AMD), well Intel is going to ship a dual-core Pentium in the second quarter of this year and that processor will run at 3.2GHz. They will also offer a version of that chip (the dual-core Pentium Extreme Edition or Pentium EE) that will support Intel's Hyper-Threading technology and that will allow this single processor to execute four threads simultaneously (Intel calls the Pentium EE a four-thread processor). I suspect that this dual-core Pentium EE will outperform any single 970MP that IBM can produce (at present or in the near future). Thus, to claim any real performance advantage over the soon-to-be, top-of-the-line Pentium desktops Apple will almost have to produce a twin or dual 970MP configuration (this would be the "quad" Power Mac).

Your mixing models a bit here. The 4-thread processor is still two real cores. Most benchmarks show that HT on x86 doesn't produce a significant performance boost however, so without a direct comparison I don't think we can really say that Apple would need 4 real cores to beat 4 virtual ones. And it is highly rumored that Intel is going to just slap together their first dual core product as simple two full fledged CPUs on a single die so they might not even see as much of a boost. I'm far more worried about what AMD will do with the Opteron. Fair to say that I anticipate benchmarks on real hardware regardless .

Given all of the above, this new 970MP doesn't give Apple any huge advantage over what will be available on the PC. On the mid-level, single-processor products it probably gives Apple rough parity with the PC (i.e. the price/performance between a high-clock-speed, single-core Pentium or AMD Athlon and a mid-level -- but similarly priced -- single 970MP Mac will be closer than it is today -- and that's good). Most likely, a single-processor 970MP will still be priced higher than a top-of-the-line, single-core Pentium, but I think the price/performance ratio will improve for the Macintosh.

Single core G5s at modest (1.8 Ghz) speeds still fair very well vs the high-end Pentiums so I don't think Apple really has much to worry about as far as G5 performance. I think the 970MP, if cost effective enough, has a real shot at giving the high end Pentiums a black eye when Apple releases a $2K model that beats the crap out of a $3K+ Xeon based machine (not the BS Pentium 4s that Intel sells to the masses). But again, I await benchmarks .

On the highest-end products, a single dual-core Pentium will most likely outperform a single 970MP. And that means that a twin processor 970MP will be needed to better the PC. The only drawback here is that a twin-processor design like we have in today's dual Power Mac G5 (and which we may have in a twin 970MP design) is much more expensive to build than a single-processor solution. Thus, the dual-processor Power Macs are likely to remain significantly more expensive than a top-of-the-line dual-core Pentium. The good thing, however, is that under certain situations (but not all) a dual-processor 970MP Power Mac will likely outperform any single-processor (dual-core) desktop system from either Intel or AMD. But that advantage may not be any better than we have today (comparing a high-clock-speed, single-core Pentium or Athlon to the currently shipping dual Power Mac G5).

The PowerMacs are pretty price competitive to the Dual Xeon based workstations that are the x86 high-end right now, so I don't think that cost is a real issue here and I don't think it will be when everyone is going dual-core either.

 

[gkhaldi]

As people have said, news of the chip is 8 months old already -- with an original ship date of Jan 2005 declared last year.

If we had to wait for fall for these things to arrive, there would be a revolt.

Of course you would expect IBM went back and massaged the chip with a new generation (970GX/MP) to solve some of the voltage & thermal issues along with tweaks to improve the yield -- or we're still in trouble.

The chip is not ready for mass production. IBM is still adjusting it's plant production for ramp-up. I could be off but my guy was pretty sure of his comments.

 

[Sun Baked]

The chip is not ready for mass production. IBM is still adjusting it's plant production for ramp-up. I could be off but my guy was pretty sure of his comments.

Is he from the Fishkill plant? or one of the older 200mm wafer plants?

In any case that a bit closer than anything else we've heard, of course IBM's fallen on their face quite spectacularly during the last two ramp-ups.

 

[Booga]

Not Necessarily Two 970MP's

If the 970MP has Symmetric MultiProcessing (SMP), which allows one processor to work on two threads at once, a single 970MP would appear to the OS as four processors. This is actually my guess for why CHUD changed. It's been years since Intel went SMP, and the idea's been around in academia for 15+ years. While it complicates some areas of the chip, it actually simplifies others (since pipeline stalls are potentially cut in half, you have less possible registers to rename, etc.) It's not unbelievable to guess that the 970MP might also be SMP.

It also means that two dual-core SMP chips would appear as 8 processors. That's probably as many execution contexts as are typically available for running at any moment on a home machine, which would lead to an ultra-responsive experience.

 

[BenRoethig]

Well, since a typical single-core processor PC can't multitask worth crap, a dual dual core G5 would be unreal to a PC user.

Plus Tiger, these machines will blast away a PC in productivity. Maybe Apple will bring back the G3 snail?

My G3 snail iBook Multitasks just fine

Just think what this means. Two dual core G5's, Dual PCI x16 supporting SLI, 3 PCI x1, and 1 PCI x4 slots. For memory uses DDR 2 at 667mhz.
Dual Layer Superdrive

Then Apple would have the latest in tech in their G5's. One can always dream.

All in an enclosure the size of the Sears Tower.

 

[nuckinfutz]

If the 970MP has Symmetric MultiProcessing (SMP), which allows one processor to work on two threads at once, a single 970MP would appear to the OS as four processors. This is actually my guess for why CHUD changed. It's been years since Intel went SMP, and the idea's been around in academia for 15+ years. While it complicates some areas of the chip, it actually simplifies others (since pipeline stalls are potentially cut in half, you have less possible registers to rename, etc.) It's not unbelievable to guess that the 970MP might also be SMP.

It also means that two dual-core SMP chips would appear as 8 processors. That's probably as many execution contexts as are typically available for running at any moment on a home machine, which would lead to an ultra-responsive experience.

No you're thinking of "SMT" which is Simultaneous Multi-Threading. SMP is simply the ability of two processors to work on different tasks. Each core/CPU still functions like one logical processor. I think we eventually see SMT added to the cores but it requires another %10 or so of transistors.

 

[fpnc]

If the 970MP has Symmetric MultiProcessing (SMP), which allows one processor to work on two threads at once, a single 970MP would appear to the OS as four processors. This is actually my guess for why CHUD changed. It's been years since Intel went SMP, and the idea's been around in academia for 15+ years. While it complicates some areas of the chip, it actually simplifies others (since pipeline stalls are potentially cut in half, you have less possible registers to rename, etc.) It's not unbelievable to guess that the 970MP might also be SMP...

As nuckinfutz noted, I think you mean SMT (Simultaneous Multi-Threading) which is similar to Intel's Hyper-Threading. It's not very likely that the 970MP supports SMT because that is an IBM technology that is supported only on the POWER5 architecture and it seems almost certain that the 970MP is based upon the existing 970 which is POWER4 based. We don't know with 100% certainly that it does NOT contain SMT, but it seems highly unlikely.

IBM has estimated that SMT can offer performance gains in the 30-40% range over a similar design that does not contain SMT, so SMT would be a big (and new) feature for the Power Mac. However, in the "real world" I think SMT would be hard pressed (i.e. unlikely) to produce the sort of gains that IBM estimates.

On the Intel side, Hyper-Threading seems to add 10-20% better performance under the best of conditions, but those gains are only seen under a very limited set of operations and/or applications. In fact, under some conditions Hyper-Threading actually seems to slow things down. But overall, it certainly is a net positive.

 

[fpnc]

Rincewind42, I agree with much of what you said, in fact I'd almost argue that you've just restated my original comments in a slightly different manner.

However, I do take some issue with you comments concerning "my mixing" of models in regard to the Hyper-Threading on the dual-core Pentium EE (reproduced below). I never said that the dual-core Pentium EE (a "four-thread processor") would be equivalent to four real cores. In fact I made it very clear that the Pentium EE was a dual-core processor that INTEL referred to a as four-thread processor. And thus, even though Intel coined that term it is still a pretty accurate description of how Hyper-Threading works.

Also, I can't agree with this comment:

Single core G5s at modest (1.8 Ghz) speeds still fair very well vs the high-end Pentiums so I don't think Apple really has much to worry about as far as G5 performance.

Are you talking about a single-processor G5 -- as in the iMac G5 or single-processor Power Mac G5 (the current low-end of the Power Mac line)? If so, I think you are being way too optimistic and/or are putting too much faith in Apple's megahertz myth campaign. A G5 at half the clock speed of a high-end Pentium 4 does not compare "very well" in raw performance. A 1.8GHz G5 is more than enough processor for most people, but it doesn't come anywhere close to a high-end Pentium 4 running at 3.4 to 3.8 GHz.

As far as the actual design of the dual-core Pentium EE, I think the early rumors where that Intel might do something of a "hack" job to produce a dual-core Pentium. But it seems that based upon Intel's actual announcement that it is a "true" dual-core, single-die processor. I agree, however, that we'll have to wait on the finished products and "real world" benchmarks before we know how either of these dual-core chips will perform.

The best overview on the dual-core Pentium EE that I've found is at the following link:

http://www.extremetech.com/article2/0,1558,1771366,00.asp

From that reference:

According to Intel, the dual-core Extreme Edition chip will be approximately twice as fast as a single-core model under optimized applications. In other tests, the chip proved to be 50 to 65 percent faster than a 3.73-GHz Pentium 4 EE chip in rendering images, Mp3 encoding, and converting video.

In any case, I'm almost willing to put money on the expectation that under most conditions a high-end, single, dual-core Pentium EE system will outperform a single, dual-core 970MP Power Mac. That's why I said that Apple would probably need a twin 970MP system ("quad") in order to claim any real performance advantage over the soon-to-be, high-end, Pentium systems (which will also be dual-core).

Of course, if Apple ships and/or demonstrates a 970MP-based Power Mac before any PCs are available with the dual-core Pentium EE then Apple might be able to claim that they were producing the fastest available, single-processor desktop. But, I suspect that it's going to be a very close race to see who actually ships first. No doubt, Steve Jobs wants to be first, but Intel and the PCs may win that race.

...Your mixing models a bit here. The 4-thread processor is still two real cores. Most benchmarks show that HT on x86 doesn't produce a significant performance boost however, so without a direct comparison I don't think we can really say that Apple would need 4 real cores to beat 4 virtual ones. And it is highly rumored that Intel is going to just slap together their first dual core product as simple two full fledged CPUs on a single die so they might not even see as much of a boost. I'm far more worried about what AMD will do with the Opteron. Fair to say that I anticipate benchmarks on real hardware regardless ...

 

[Evangelion]

To do what you want would either require all cores on a single chip or a transition to a NUMA architecture.

Well, with NUMA, each CPU would have local RAM, but they would have access to other CPU's RAM as well. And with integrated-mem-controller, that comes more or less default. It shouldn't take that much work hardware-wise, but it would take work to get it running in the software (so that apps are aware that for some CPU's, part of the RAM is local, and part is not)

I suspect that IBM is exploring memory controller on die, but might not have seen a win yet for the small systems that it is building with these chips.

They benefit small systems as well. Interated mem-controller makes wiring on the MoBo alot simpler. I mean, the Northbridge connects to RAM, CPU, Southbridge and PCI/AGP-devices. And that's complex! Integrated mem-controller removes the RAM-connection, as well as connection to southbridge, if you go for a single-chip solution (which could be doable, since northbridge would lose quite alot of functionalit with IMC).

There is a huge win for this on larger systems, but these are larger than what we are discussing on this thread (i.e. systems larger than 2-way at the bus level).

Opterons seem to benefit from it, even with just 2 CPU's .

 

[BenRoethig]

They benefit small systems as well. Interated mem-controller makes wiring on the MoBo alot simpler. I mean, the Northbridge connects to RAM, CPU, Southbridge and PCI/AGP-devices. And that's complex! Integrated mem-controller removes the RAM-connection, as well as connection to southbridge, if you go for a single-chip solution (which could be doable, since northbridge would lose quite alot of functionalit with IMC).

In theory a 900 series processor with an on die memory controller may be able to use the same chipsets as the AMD K8 series.

 

[Rincewind42]

Well, with NUMA, each CPU would have local RAM, but they would have access to other CPU's RAM as well. And with integrated-mem-controller, that comes more or less default. It shouldn't take that much work hardware-wise, but it would take work to get it running in the software (so that apps are aware that for some CPU's, part of the RAM is local, and part is not)

Hopefully user-level software shouldn't need any awareness of such differences, but it may be an issue for optimization (and the need to know how much RAM is local to each CPU).

They benefit small systems as well. Interated mem-controller makes wiring on the MoBo alot simpler. I mean, the Northbridge connects to RAM, CPU, Southbridge and PCI/AGP-devices. And that's complex! Integrated mem-controller removes the RAM-connection, as well as connection to southbridge, if you go for a single-chip solution (which could be doable, since northbridge would lose quite alot of functionalit with IMC).

Well, I'm wondering what the impact would be on DMA transfers -- now the CPU is contending with other devices to access it's own memory controller. But I guess I should wait a little longer to see what my professor has to say about NUMA systems .

 

[ddtlm]

BenRoethig:

In theory a 900 series processor with an on die memory controller may be able to use the same chipsets as the AMD K8 series.

The hypertransport-attached PCI-X tunnel in current PMacs is almost certainly a "chipset" component from AMD already. I'm wondering if Apple will be able to use any more hypertransport-attached PC chips in the future, could save themselves a lot of R&D money (for example nVidia has good PCI-E support on such chips).

Rincewind42:

Well, I'm wondering what the impact would be on DMA transfers -- now the CPU is contending with other devices to access it's own memory controller.

How is this any different than a standard FSB & chipset setup?

 

[Rincewind42]

Well, I'm wondering what the impact would be on DMA transfers -- now the CPU is contending with other devices to access it's own memory controller.

How is this any different than a standard FSB & chipset setup?

Probably should have explained myself better. Normally DMA will be setup by the CPU and ignored with the offboard memory controller dealing with it. But now the CPU's busses to memory have to be involved whereas before those busses didn't need to get involved (so the CPU could be potentially doing other things with it's bus while the DMA talks to memory). But again, I'm not entirely familiar with what things look like in that situation so I was wondering what tradeoffs it would entail.

But then again, this is veering off topic of this thread, so I'm going to drop it.

 

[ddtlm]

Rincewind42:

Even though its on-die, the memory controller still operates separately from the CPU, so really nothing has changed from the CPU's view, except that the FSB (on die) is now really really fast (in both latency and bandwidth).

 

[appleface]

reality

The chip is not ready for mass production. IBM is still adjusting it's plant production for ramp-up. I could be off but my guy was pretty sure of his comments.

so, realistically guessing, how long before a pb is shipping with dual dual cores?

on the topic, but off the topic as well... when will apple's lappies get next gen processors (g5 or dual g4s or something else)? are there any clues out there?

 

[ddtlm]

gkhaldi:

The chip is not ready for mass production. IBM is still adjusting it's plant production for ramp-up.

I'd hope they've already entered mass production, because the entire process apparently takes months, start to finish. This is not something they start on monday and sell on friday.

 

[pubwvj]

once again, i'm highly doubting the 970 will make it into powerbooks... it's still way to hot

Actually it means the opposite. It means Dual-Core G5 PowerBooks are MORE likely to be doable because either of the cores can be slowed down dynamically if the temperature starts to get to high. That will reduce power consumption and thus heat. Fan kicks in as necessary. A little liquid cooling to the case and you have a D-C G5 PowerBook. Cool.

 

[Pedro Estarque]

More Cache, less Hz

Does anyone else think that instead of drooling about getting an extra 500 MHz in each CPU we should be requesting for more Mb (or bytes ) in cache?
So OK, we have CPUs that clocks beyond 3 GHz. But it stays most of the time waiting for something to do. Even RAM clocks much slower then the CPU, and it still has to compete with everything else in the bus. Until we can't have a system that runs at full clock speed I think the only way out is cache. What good is a 3 Ghz CPU waiting ( heating ) for a 7200 rpm HD to find the bytes it needs ? Clock increase alone will only decrease the job done per cycle/watt. The problem gets even worse with quads, how do you feed all 4 of them efficiently ?
What I would really like to see is a 4W 1Ghz G4 with 512k L1 and 8 MB L2 cache beat the hell out of a 3 GHz dual core G5

 

[daveL]

Does anyone else think that instead of drooling about getting an extra 500 MHz in each CPU we should be requesting for more Mb (or bytes ) in cache?
So OK, we have CPUs that clocks beyond 3 GHz. But it stays most of the time waiting for something to do. Even RAM clocks much slower then the CPU, and it still has to compete with everything else in the bus. Until we can't have a system that runs at full clock speed I think the only way out is cache. What good is a 3 Ghz CPU waiting ( heating ) for a 7200 rpm HD to find the bytes it needs ? Clock increase alone will only decrease the job done per cycle/watt.
What I would really like to see is a 4W 1Ghz G4 with 512k L1 and 8 MB L2 cache beat the hell out of a 3 GHz dual core G5

More cache ($$) is always a good thing However, it isn't *as* important on a system with fast FSBs (G5) as it is on systems with painfully slow FSBs (G4). If the rumors are correct, the 970MP will have twice as much L2 cache *per core* as the current 970FX. Goodness.

 

[fpnc]

Cache concerns? The 970MP has twice the L2 cache per core as does the existing 970FX (the latter used in the current G5 iMac and Power Mac). That is, each core on the 970MP has 1MB of cache while on the 970FX you only get 512MB.

As far as placing massive amounts of cache on chip, that doesn't always result in faster overall performance. There has to be a lot of system and internal chip changes to make an extremely large cache work as well as you might expect. For example, Intel's Pentium EE contains 2MB of L2 cache but it performs only very slightly better (sometimes worse) than a similar chip with only 1MB of cache.

The most likely keys to significant performance improvement on the PowerPC are either an Integrated Memory Controller (IMC) and/or support for Simultaneous Multi-Threading (SMT). Both of which have already been discussed in this thread. Unfortunately, it appears that the 970MP has neither of these features.

In any case, it's only rumor as to what the core clock speed will be in the 970MP. IMO, expecting a 3GHz 970MP system is probably overly optimistic. I think it is going to be closer to today's top end which is 2.5GHz (same clock speed, but with dual cores).

Does anyone else think that instead of drooling about getting an extra 500 MHz in each CPU we should be requesting for more Mb (or bytes ) in cache?
So OK, we have CPUs that clocks beyond 3 GHz. But it stays most of the time waiting for something to do. Even RAM clocks much slower then the CPU, and it still has to compete with everything else in the bus. Until we can't have a system that runs at full clock speed I think the only way out is cache. What good is a 3 Ghz CPU waiting ( heating ) for a 7200 rpm HD to find the bytes it needs ? Clock increase alone will only decrease the job done per cycle/watt. The problem gets even worse with quads, how do you feed all 4 of them efficiently ?
What I would really like to see is a 4W 1Ghz G4 with 512k L1 and 8 MB L2 cache beat the hell out of a 3 GHz dual core G5

 

[wdlove]

Cache concerns? The 970MP has twice the L2 cache per core as does the existing 970FX (the latter used in the current G5 iMac and Power Mac). That is, each core on the 970MP has 1MB of cache while on the 970FX you only get 512MB.

In any case, it's only rumor as to what the core clock speed will be in the 970MP. IMO, expecting a 3GHz 970MP system is probably overly optimistic. I think it is going to be closer to today's top end which is 2.5GHz (same clock speed, but with dual cores).

Would the dual core effectively give you double the GHz of just one core?

 

[billyboy]

So, having read through this thread, have i got this right? the Chud on the SMT means dual dual processor freeserves for 3.5GHz PowermacBooks addressing 64GB of memory next April?

It cracks me up how the techno heads surface and flex their enormous mental muscles quoting FSBs on the backend diode at x KHz per tetra cycle newton.

In a nutshell, will the next set of Powermacs be faster than what I already have, and still be simple enough to switch on with a push of a button? If so, what date and how much? And where, and why does anyone just using iTunes and email need to care? Thanks.

 

[Rootman]

I don't know if you are 15 years old or what. How about DESIGN, the relentless pursuit of refinement, and including people with backgrounds in fields other than straight tech design teams so that there is a little bit of poetry, a little bit of artistry and maybe a little bit of history too in every machine.

I could go for a little less poetry and history and a little more GPU RAM.

 

[mowry]

The application note has been removed

"HTTP Web Server: Lotus Notes Exception - Document has been deleted"

I guess that means it was posted before its time.