Apple has used the tick-tock cadence similar to Intel for a while now. The A12 was 7nm and the A13 was 7nm+, but the A13 still claimed to be 20% faster and 40% more power efficient than the A12 despite both being 7nm. That’s hardly a stopgap.
What you said is true, but not dispositive. Here are the factors that actually matter:
(a) Apple designs cores (at least so far...) on a 4 yr cycle. A7 (and A11) were the baseline designs, the next 3 models were iterative improvements to those underlying designs. (Iterative doesn't mean "small", but it means fairly obvious extensions, not big rethinking).
If you do the math, you'll see that means A15 is the next such new baseline design.
(b) It makes sense for Apple to align with ARMv9 (various new security features, and, importantly, SVE/2 as a big ISA extension). It makes sense for A15 to be the vehicle that brings about this alignment.
(c) Growing beyond MBA and low-end mac pro/mini/imac requires at least 8 big cores. This requires at least tuning and some rethinking of the baseline A11..A14 designs (which, at the SoC level, are based around 1 P cluster and 1 E cluster). The point is growing this design is not an "easy" increase from 4 to 8 larger cores; it's a more substantial rethink of "increase from 1 to 2 P-clusters".
(d) But that's the least of it. Growing to to iMac Pro and Mac Pro levels will require 16 or 32 large cores, with memory bandwidth and GPU capacity scaling in sync. There's an uninteresting set of arguments one can have about exactly how this might be done (pack discrete chips in an MCM vs chiplets in a single package? have compute-only chiplets, with IO+security and suchlike on a separate chiplet?), the common thread is that whatever is done will require a communications fabric between "compute units" (chips, chiplets, whatever) beyond what Apple has in place today. Again low level arguments about exactly how this might be sliced and diced are uninteresting (because so many options are possible, with no way to know what will be chosen), the part that's not negotiable is such a much more powerful fabric (think the equivalent of many more PCIe lines) is necessary.
(e) Point d leads to the issue of large RAM footprints. IMHO the best way to achieve this is via an extension of the current M1 paradigm (with 16 or 32GB onboard per "compute unit") which covers most user cases well, and with the extra connectivity I described above available to be routed (for at least some use cases) to something like CXL DRAM expansion.
What all these suggest is
- it makes sense for Apple to create a "very different-looking" (at the technical level) sort of product for this next generation.
- technically not a tick or a tock, but massive changes along many dimensions. Some user visible (expansion to many more cores), some developer visible (v9 ISA), some only micro-architecturally visible (A15 new baseline core); new packaging concepts (to grow to 16 or 32 cores); new connectivity concepts beyond what Apple has done before.
To users it may not seem THAT big a deal, but for those of us looking at every level of the tech stack, I expect the A15/M2 generation to be the equivalent of the A6 to A7 jump -- something way beyond what most expected (both in the Apple community and amongst competitors) that recalibrates what people think Apple is capable of, and the level of their ambitions.
