But how many pci-e lanes are powering the TB bus?
The current on is x4 lanes. Intel made no specific comments one way or other on the Thunderbolt v2.0 information dropped so far. It seems quite likely that it is still x4. Most of the "it is alot more bandwidth" comments were accompanied by talking about 4K video.
TB v2.0 is really the same overall aggregate bandwidth that was available in TB v1.0 only with the divider between PCI-e and Display Port data traffic removed. ( two 10 Gb/s channels turned into one logical 20 Gb/s channels. )
It is waaaaaaaaaaaaaaaaay behind the bandwidth of a x16 PCI-e v3.0 slot. With compression tricks and cache you may be able to game through TB v2.0 but still stuck at x4. OpenCL work would take a huge hit going outside. ( probably why they stuff two GPUs into the box. )
There are big time missing specs. ( from what I've seen so far). Which Firepro GPUs, how much VRAM , etc.