So this patent deals with a possible way to generate an array of microLEDs. Congrats... There's just 2 problems:
1. Sounds pretty trivial. This is not going to impact the quality of the microLED at all, and at most, it sounds like a toilet paper patent just a hair above Apple's "rectangle with rounded corners" patent in terms of significance.
2. Every microLED manufacturer probably already has their own method of forming their microLED array. Why would they opt for Apple's method when their own in-house solution is probably lower cost due to higher economies of scale?
Did you read the abstract? This sounds like a copy paste of the previous patent. At this point, I think Apple is just patenting every little thing. Not sure what their purpose is.
This patent does not deal with microLED image quality.
This is probably a marketing move to trick their fans into thinking they're receiving super, ultra secret technology. I doubt anything useful comes out of the acquisition.
A marketing move made way back in, what, 2014? Give me a break. And “abstracts” aren’t what determines what is patented. The claims do. So here are some claims, taken from Apple’s dozens of patents on methods of manufacturing microLEDs, so that anyone else reading knows better than to buy what you’re trying to sell:
Some methods for manufacturing microLEDs that apple has invented:
- A method of forming an array of micro-light emitting diodes (LEDs), the method comprising the steps of: bonding a first substrate stack to a second substrate stack by a bonding layer; wherein the first substrate stack comprises: a pn type a diode layer, the pn diode layer is formed on the first substrate; a plurality of independent reflective metallization stacks on the pn diode layer; a patterned electrical insulating layer, the patterned electrical property An insulating layer laterally between the plurality of separate reflective metallization stacks on the pn-type diode layer; wherein bonding the first substrate stack to the second substrate stack with the bonding layer comprises patterning the pattern One of the insulating layers is embedded in the bonding layer; the first substrate is removed; and the pn-type diode layer is etched through to form a plurality of layers over the plurality of independent reflective metallization stacks a micro pn-type diode and exposing the patterned electrically insulating layer laterally between the plurality of micro pn-type diodes.
- The method of claim 1, wherein the first substrate stack comprises the patterned electrically insulating layer and one of the plurality of independent reflective metallization stacks above the first conductive bond a layer, and the second substrate stack includes a second conductive bonding layer; and wherein the step of bonding the first substrate stack to the second substrate stack further comprises the step of bonding the first conductive bonding layer to the second The conductive bonding layer forms an alloy bonding layer.
- 1. A method of forming a micro LED array comprising:
forming a plurality of laterally separate self-aligned metallization stacks within a corresponding plurality of openings in a patterned sacrificial layer formed on a p-n diode layer;
bonding a first substrate stack including the plurality of laterally separate self-aligned metallization stacks, the patterned sacrificial layer, and the p-n diode layer to a second substrate with a bonding layer;
etching through the p-n diode layer to form a plurality of micro p-n diodes over the plurality of separate metallization stacks, and exposing the patterned sacrificial layer laterally between the plurality of separate metallization stacks; and
removing the patterned sacrificial layer.
- 1. A method of forming a micro LED array in the following sequence comprising:
bonding a first substrate stack to a second substrate stack with a bonding layer;
wherein the first substrate stack comprises:
a p-n diode layer formed on a first substrate;
a plurality of separate reflective metallization stacks on the p-n diode layer;
a patterned electrically insulating layer laterally between the plurality of separate reflective metallization stacks on the p-n diode layer;
removing the first substrate; and
etching through the p-n diode layer to form a plurality of micro p-n diodes over the plurality of separate reflective metallization stacks, and exposing the patterned electrically insulating layer laterally between the plurality of micro p-n diodes, wherein the patterned electrically insulating layer acts as an etch stop layer during the etching.
1. A method of fabricating a micro device comprising:
bonding a first substrate stack to a second substrate stack with an intermediate electrically conductive bonding layer having a liquidus temperature of 350° C. or lower;
patterning an active device layer of the first substrate stack to form a plurality of micro devices;
heating a region of the intermediate electrically conductive bonding layer to the liquidus temperature or higher;
picking up one of the plurality of the micro devices and a portion of the intermediate electrically conductive bonding layer with a transfer head;
placing the micro device and the portion of the intermediate electrically conductive bonding layer on an electrically conductive receiving bonding layer on a receiving substrate; and
bonding the intermediate electrically conductive bonding layer to the electrically conductive receiving bonding layer to form a permanent alloy bonding layer having a liquidus temperature above 150° C.
1. A stabilization structure comprising:
a carrier substrate;
an array of micro devices on the carrier substrate, wherein each micro device includes a device layer with a bottom surface;
a stabilization layer including an array of staging cavities corresponding to the array of micro devices, wherein each staging cavity includes sidewalls of the stabilization layer that completely laterally surround at least a portion of a thickness of the device layer of a corresponding micro device; and
a sacrificial release layer that completely covers a bottom surface forming a lower main surface of each staging cavity, spans along the sidewalls of each cavity, and spans underneath an entirety of the bottom surface of the device layer of the corresponding micro device;
wherein the array of micro devices is embedded in the sacrificial release layer within the array of staging cavities, wherein the stabilization layer spans directly underneath each micro device.
There are literally dozens of patents like this, each going to different methods of making microled devices. There are about a dozen patents that go to designs for specific equipment like transfer heads to be used in the manufacturing process. There are dozens of patents that go to the structure of the microled panels. And there are dozens of patents that go to support circuits, like variable-rate refresh.
Anybody who wants to check, just go to the USPTO website and search for AN/Apple and microled. You’ll have plenty of reading material.
