I've been lurking here keeping up with this thread as often as possible, and although I haven't read every page, I have some thoughts on what we might expect from a Nehalem DP Mac Pro.
First let me say that perhaps this thread is getting too long? Can we not start posting threads in the main forum on different subjects rather than try to put everything in here?
Anyway, excuse me if this has already been discussed to a logical conclusion, but I notice in the first post, that current speculation has dual risers with 12 slots for ECC based DDR3 memory.
Based on what I know, riser based RAM was unique to FBDIMM technology. Risers cannot be used on regular memory such as DDR2 and DDR3 where each module has a physical connection to the memory controller. Trace length plays an important role in DDR memory performance and trace lengths must be maintained as equal as possible to avoid phase issues. While DDR3 technology compensates for this somewhat, I still don't think DDR3 could ever support something like a riser.
If this holds true, then I believe we will see memory directly on the motherboard. The Nehalem-EP dual processor architecture offers 3 DDR3 channels per processor with each channel supporting up to 3 physical DIMMS. That's a maximum of 9 DIMM slots per processor or 18 for a dual socket system. This is supported by Intel's roadmap slide and existing prototype boards that are floating around.
Another intersting fact is that early Nehalem-EP systems appear to support non-ECC memory which is good news for desktop users as it should improve performance (slightly) while reducing cost and increasing choice. (Link)
On the subject of I/O, I assume Apple will adopt Intel's ICH10 southbridge chip for I/O which will provide the following capabilities, although there's no guarantee that Apple won't ignore some of this capability or supplement it with additional capability.
First let me say that perhaps this thread is getting too long? Can we not start posting threads in the main forum on different subjects rather than try to put everything in here?
Anyway, excuse me if this has already been discussed to a logical conclusion, but I notice in the first post, that current speculation has dual risers with 12 slots for ECC based DDR3 memory.
Based on what I know, riser based RAM was unique to FBDIMM technology. Risers cannot be used on regular memory such as DDR2 and DDR3 where each module has a physical connection to the memory controller. Trace length plays an important role in DDR memory performance and trace lengths must be maintained as equal as possible to avoid phase issues. While DDR3 technology compensates for this somewhat, I still don't think DDR3 could ever support something like a riser.
If this holds true, then I believe we will see memory directly on the motherboard. The Nehalem-EP dual processor architecture offers 3 DDR3 channels per processor with each channel supporting up to 3 physical DIMMS. That's a maximum of 9 DIMM slots per processor or 18 for a dual socket system. This is supported by Intel's roadmap slide and existing prototype boards that are floating around.
Another intersting fact is that early Nehalem-EP systems appear to support non-ECC memory which is good news for desktop users as it should improve performance (slightly) while reducing cost and increasing choice. (Link)
On the subject of I/O, I assume Apple will adopt Intel's ICH10 southbridge chip for I/O which will provide the following capabilities, although there's no guarantee that Apple won't ignore some of this capability or supplement it with additional capability.
