4K at 30Hz only

[lynguist]

This is actually a very interesting topic and I think all previous answers are misleading or not pointing towards your real problem.

The thing is:
- Macbook outputs DP 1.2 (not DP 1.4!)
- Your monitor can do 4k60 only over HDMI
- Your hub can only do 4k60 HDMI if the incoming signal is DP 1.4. DP 1.2 is turned into 4k30.

See here the Auflösungsleitfaden from your amazon.de link!

If you really want to make it all work, you need a special Hub that internally converts DP 1.2 to HDMI via a computation chip. I don't know which Hub can do that, but if you search for "DP 1.2 to HDMI 2.0 adapter", you will find adapters that do exactly that.

 

[joevt]

This is actually a very interesting topic and I think all previous answers are misleading or not pointing towards your real problem.

The thing is:
- Macbook outputs DP 1.2 (not DP 1.4!)
- Your monitor can do 4k60 only over HDMI
- Your hub can only do 4k60 HDMI if the incoming signal is DP 1.4. DP 1.2 is turned into 4k30.

My post at https://forums.macrumors.com/threads/4k-at-30hz-only.2455257/post-33858961 has all the info and describes the problem.

Your monitor can do 4k60 only over HDMI

It can do 4K60 over DisplayPort as well. 4K60 cannot happen unless the average data per pixel is low enough to allow the pixel rate (533 MHz for CVT-RB, 594 MHz for HDMI) over the connection type (two lanes of DisplayPort 1.2 converted to HDMI in the case of this USB-C hub and Mac combination).

See here the Auflösungsleitfaden from your amazon.de link!

I don't see that image for the 7-in-1 linked at https://www.amazon.de/Baseus-Adapter-Kartenleser-Docking-Station/dp/B0C9JKKL7N/?tag=macr05-21
What link did you use? I think you clicked on the 9-in-1 product?

If you really want to make it all work, you need a special Hub that internally converts DP 1.2 to HDMI via a computation chip. I don't know which Hub can do that, but if you search for "DP 1.2 to HDMI 2.0 adapter", you will find adapters that do exactly that.

All USB-C hubs with a HDMI port use a DP to HDMI chip. The problem with USB-C hubs that support USB 3.x is that they only have 2 lanes of DisplayPort instead of all 4 lanes of DisplayPort.

With 2 lanes of HBR2, the average bits per pixel for 4K60 needs to be between 12 and 16 bits (a normal pixel is 24 bits). This is achievable with DSC or 4:2:0 or 4:2:2 chroma sub sampling but DisplayPort 1.2 doesn't have DSC or 4:2:0 chroma sub sampling. 4:2:2 8bpc is 16 bpp and can work up to 540 MHz using 2 lanes of HBR2.

 

[star-affinity]

You missed/ignored the posts that mention a hidden menu of the Dell P2415Q that enables HDMI 2.0 (4K60) for its HDMI port. The thread is less than 3 pages. Not long at all. And this secret menu was mentioned in the first post.
I have the same monitor and have used the hidden menu to enable 4K60 via HDMI.

Yes, I missed it. Sorry.
But here comes my defense speech.
It says in the first post ”Yet no matter if HDMI 1.4 is enabled or disabled in Dell's 'secret' menu…” which I don't think clearly means HDMI 2.0 is enabled and supported on this display. That's why I also wrote: ”Dell P2415Qb seems to support 4K@60 Hz only via the DisplayPort.”

And three pages of deviations is quite long to go through if you're busy doing other things an quickly want to help (I actually started to read the threads, but stopped). But I shouldn't have obviously.

I now also see @chrfr's post:

The search result you found is incorrect in this case, the P2415Q/Qb does support 4k/60 over HDMI but HDMI 2.0 has to be enabled in the hidden menu mentioned elsewhere in this thread.

So good! There is support for 4K@60 Hz on the display in a ”secret menu”. Many spec lists for P2415Q only shows HDMI 1.4 as being supported. The HDMI 2.0 option being there seems related to the (non-user upgradable it seems) firmware version the display has.

Anyway, then I guess it should work if the cable is good and the adapter supports it! If the 12-inch MacBook 2017 should be able to handle it? Not sure what is wrong then. Would give a different cable a go and also try the hub and cable with a more modern Mac or PC and see if it works fine with that, to rule out if it's the MacBook or the rest of the chain.

Edit:
I see you clearly explained (several times) what's going on @joevt – nice work!

Apple made it perfectly clear. Your MacBook supports 4K60.
You made it complicated when you decided to constrict the DisplayPort output with a USB-C dock that supports USB 3.x (and therefore removes half the bandwidth available to DisplayPort).

@Scrooge MacDuck hope you are also clear about what the the problem is.

 

[salamanderjuice]

My post at https://forums.macrumors.com/threads/4k-at-30hz-only.2455257/post-33858961 has all the info and describes the problem.


It can do 4K60 over DisplayPort as well. 4K60 cannot happen unless the average data per pixel is low enough to allow the pixel rate (533 MHz for CVT-RB, 594 MHz for HDMI) over the connection type (two lanes of DisplayPort 1.2 converted to HDMI in the case of this USB-C hub and Mac combination).


I don't see that image for the 7-in-1 linked at https://www.amazon.de/Baseus-Adapter-Kartenleser-Docking-Station/dp/B0C9JKKL7N/?tag=macr05-21
What link did you use? I think you clicked on the 9-in-1 product?


All USB-C hubs with a HDMI port use a DP to HDMI chip. The problem with USB-C hubs that support USB 3.x is that they only have 2 lanes of DisplayPort instead of all 4 lanes of DisplayPort.

With 2 lanes of HBR2, the average bits per pixel for 4K60 needs to be between 12 and 16 bits (a normal pixel is 24 bits). This is achievable with DSC or 4:2:0 or 4:2:2 chroma sub sampling but DisplayPort 1.2 doesn't have DSC or 4:2:0 chroma sub sampling. 4:2:2 8bpc is 16 bpp and can work up to 540 MHz using 2 lanes of HBR2.

View attachment 2502493

Are you sure it's that cut and dry? I have a random generic USB C steam deck dock that has a DP 1.2 port (they even labelled it that on the back), supports USB 3 speeds, hooked up to a 1440p 144 Hz monitor using specifically DP version 1.2 in the monitor settings. So it shouldn't support DSC or HBR3 in that mode and I can get well over USB 2 speeds. 1440p @ 144 Hz requires a higher pixel clock than 4k @ 60Hz no? Perhaps some hubs can prioritize display output over USB speeds?

Granted I don't have a device as old as the MB 2017 with USB C with 5Gbps speeds anymore or a Mac.

 

[joevt]

Are you sure it's that cut and dry? I have a random generic USB C steam deck dock that has a DP 1.2 port (they even labelled it that on the back), supports USB 3 speeds, hooked up to a 1440p 144 Hz monitor using specifically DP version 1.2 in the monitor settings. So it shouldn't support DSC or HBR3 in that mode and I can get well over USB 2 speeds. 1440p @ 144 Hz requires a higher pixel clock than 4k @ 60Hz no?

Right. 1440p144 is at least 586 MHz (CVT-RB2)

The SteamDeck supports DisplayPort 1.4 so it's possible for it to output pixels up to 720 MHz using HBR2 x2, 4:2:0 chroma subsampling, 8bpc. For HDR, 10bpc is probably required - that would be limited to 576 MHz which would require less blanking time than CVT-RB2 (zero blanking is 531 MHz but I don't think that's possible). Some blanking is required for audio.

What display? Does it support 4:2:0? HDR?
What dock?

What information does the display show in its onscreen menu?
Some of these: resolution, refresh rate, pixel depth, pixel clock, chroma sub sampling mode, connection type?

The EDID of the display should say if the display supports 4:2:0.

Perhaps some hubs can prioritize display output over USB speeds?

A USB-C cable has 4 super speed lines. USB-C DisplayPort Alt Mode reserves two super speed lines for USB 3.x (one for receive, another for transmit). That leaves only two lines for DisplayPort. There's no way to use some bandwidth from the USB lines to increase DisplayPort bandwidth.

Thunderbolt, on the other hand, puts PCIe, USB and DisplayPort packets on the same lines so it can share the Thunderbolt bandwidth between all of them.

 

[salamanderjuice]

Right. 1440p144 is at least 586 MHz (CVT-RB2)

The SteamDeck supports DisplayPort 1.4 so it's possible for it to output pixels up to 720 MHz using HBR2 x2, 4:2:0 chroma subsampling, 8bpc. For HDR, 10bpc is probably required - that would be limited to 576 MHz which would require less blanking time than CVT-RB2 (zero blanking is 531 MHz but I don't think that's possible). Some blanking is required for audio.

What display? Does it support 4:2:0? HDR?
What dock?

What information does the display show in its onscreen menu?
Some of these: resolution, refresh rate, pixel depth, pixel clock, chroma sub sampling mode, connection type?

The EDID of the display should say if the display supports 4:2:0.


A USB-C cable has 4 super speed lines. USB-C DisplayPort Alt Mode reserves two super speed lines for USB 3.x (one for receive, another for transmit). That leaves only two lines for DisplayPort. There's no way to use some bandwidth from the USB lines to increase DisplayPort bandwidth.

Thunderbolt, on the other hand, puts PCIe, USB and DisplayPort packets on the same lines so it can share the Thunderbolt bandwidth between all of them.

I'm using a JBCE dock (https://www.newegg.com/p/3B3-007S-00005) plugged into an LG Ultragear 27GL83A-B, I also have it going through a cheapo DP 1.2 KVM (https://www.amazon.com/Steetek-Displayport-Monitors-Computers-Keyboard/dp/B0CJTWHVDL). So two of three of the devices in the chain at least claim to only be DP 1.2. So it should only be DP 1.2 despite my computers/monitor technically being 1.4 capable.

The monitor does not support 4:2:0, only 4:4:4 and 4:2:2. It does do HDR, but I'm not using it. Monitor information tells me I am using 2560x1440 144Hz with HDR off, nothing more than that. Getting Chroma sub sampling information out of Linux is surprisingly hard but using a Chroma sub sampling test suggests 4:4:4 (https://www.geeks3d.com/20141203/ho...-chroma-subsampling-used-with-your-4k-uhd-tv/). I don't think I would be satisfied with the others and would have noticed. I'm explicitly using the DP 1.2 compatibility mode in my monitor's settings too. If I use 1.1 mode the refresh rate drops to 100 Hz. So that at least does something.

It does seem like at least some hubs could switch how they configured lanes depending on how devices were plugged in: https://www.bigmessowires.com/2019/05/19/explaining-4k-60hz-video-through-usb-c-hub/

 

[joevt]

I'm using a JBCE dock (https://www.newegg.com/p/3B3-007S-00005) plugged into an LG Ultragear 27GL83A-B, I also have it going through a cheapo DP 1.2 KVM (https://www.amazon.com/Steetek-Displayport-Monitors-Computers-Keyboard/dp/B0CJTWHVDL). So two of three of the devices in the chain at least claim to only be DP 1.2. So it should only be DP 1.2 despite my computers/monitor technically being 1.4 capable.

The monitor does not support 4:2:0, only 4:4:4 and 4:2:2. It does do HDR, but I'm not using it. Monitor information tells me I am using 2560x1440 144Hz with HDR off, nothing more than that. Getting Chroma sub sampling information out of Linux is surprisingly hard but using a Chroma sub sampling test suggests 4:4:4 (https://www.geeks3d.com/20141203/ho...-chroma-subsampling-used-with-your-4k-uhd-tv/). I don't think I would be satisfied with the others and would have noticed. I'm explicitly using the DP 1.2 compatibility mode in my monitor's settings too. If I use 1.1 mode the refresh rate drops to 100 Hz. So that at least does something.

Both the host and the display support DP 1.4 so maybe DSC is being used.

A DP 1.2 KVM and a DP 1.2 USB-C hub might allow DSC. Their DP 1.2 limit is only in regards to link rate of the data since they shouldn't have anything that interprets the data unless one of them included an HDMI port?

The DP 1.2 switch of the display might not stop the display from advertising DSC capability. It might just limit its link rate to HBR2. You would need a method to dump the DPCD info to find out. Linux might have a way to do that. An Intel Mac can use my AllRez app. The DPCD info will have the link rate and link width and the DSC info.

DP 1.1 uses HBR link rate. Two lanes of HBR would allow only 360 MHz at 12bpp (the default DSC target bpp for macOS) and 540 MHz at 8bpp (the lowest DSC bpp target).
I suppose you could get 1440p120 in that case, if DSC@8bpp was supported. Did you try anything between 100 and 144Hz?
I think 100Hz refresh has a pixel clock of at least 399 MHz (CVT-RB2) and therefore requires at most 10bpp - definitely more than 4:2:0 can give (12bpp 8bpc).

Note that DSC target bpp does not affect bpc so HDR can be supported regardless of bpp.

DSC allows fractional bpp (in 1/16th increments but I haven't seen fractions get used).

It does seem like at least some hubs could switch how they configured lanes depending on how devices were plugged in: https://www.bigmessowires.com/2019/05/19/explaining-4k-60hz-video-through-usb-c-hub/

Yes, the Startech DK30C2DAGPD USB-C hub is interesting because of the USB 2.0/3.x switch
https://www.startech.com/en-ca/universal-laptop-docking-stations/dk30c2dagpd
I think there are other such hubs but I don't remember them.

 

[salamanderjuice]

Both the host and the display support DP 1.4 so maybe DSC is being used.

A DP 1.2 KVM and a DP 1.2 USB-C hub might allow DSC. Their DP 1.2 limit is only in regards to link rate of the data since they shouldn't have anything that interprets the data unless one of them included an HDMI port?

The DP 1.2 switch of the display might not stop the display from advertising DSC capability. It might just limit its link rate to HBR2. You would need a method to dump the DPCD info to find out. Linux might have a way to do that. An Intel Mac can use my AllRez app. The DPCD info will have the link rate and link width and the DSC info.

DP 1.1 uses HBR link rate. Two lanes of HBR would allow only 360 MHz at 12bpp (the default DSC target bpp for macOS) and 540 MHz at 8bpp (the lowest DSC bpp target).
I suppose you could get 1440p120 in that case, if DSC@8bpp was supported. Did you try anything between 100 and 144Hz?
I think 100Hz refresh has a pixel clock of at least 399 MHz (CVT-RB2) and therefore requires at most 10bpp - definitely more than 4:2:0 can give (12bpp 8bpc).

Note that DSC target bpp does not affect bpc so HDR can be supported regardless of bpp.

DSC allows fractional bpp (in 1/16th increments but I haven't seen fractions get used).


Yes, the Startech DK30C2DAGPD USB-C hub is interesting because of the USB 2.0/3.x switch
https://www.startech.com/en-ca/universal-laptop-docking-stations/dk30c2dagpd
I think there are other such hubs but I don't remember them.

Maybe DSC is used but I couldn't find a way to check in Linux with my hardware that worked on my setup. It doesn't make much sense though does it? The hub claims DP 1.2 and 4K@60 but the only way to achieve that would be to have DP 1.4 hardware. But I suppose it's possible. The hub does include an HDMI port although that's not being used.

Using DP 1.1 mode on monitor is limited to 100Hz, can't go beyond that.

I do also have the official Valve dock, which says it is DP 1.4 but interestingly has a cap of 1440p 120Hz, which even Valve admits. So clearly there's some differences between what DP chips manufacturers stuff in.

 

[Dallas-Star-202504]

the old macbook is only compatible with 30hz i guess

 

[joevt]

Maybe DSC is used but I couldn't find a way to check in Linux with my hardware that worked on my setup. It doesn't make much sense though does it? The hub claims DP 1.2 and 4K@60 but the only way to achieve that would be to have DP 1.4 hardware. But I suppose it's possible. The hub does include an HDMI port although that's not being used.

It seems to be saying 4K@60 is achievable from the HDMI port. It doesn't go into details about the DisplayPort 1.2 port.
HDMI can use 4:2:0. DisplayPort 1.2 usually cannot.

I didn't notice that the dock has an MST hub. In that case you would need to get the DPCD of the MST hub and the display. My AllRez app with running on an Intel Mac can get that info. I don't know what app you would use on Linux or Windows.

Can a DisplayPort 1.2 MST hub pass unmolested DSC as long as it is using HBR2 link rate? All of my MST hubs are DisplayPort 1.4.

Using DP 1.1 mode on monitor is limited to 100Hz, can't go beyond that.

Did you try to create any custom timings between 100Hz and 144Hz, such as 101Hz?

I do also have the official Valve dock, which says it is DP 1.4 but interestingly has a cap of 1440p 120Hz, which even Valve admits. So clearly there's some differences between what DP chips manufacturers stuff in.

Maybe the mean the limit of the SteamDeck or the limit without DSC. Or the limit of an HDMI adapter in the dock?

There should be no difference in DP chips. Either it supports HBR2 or HBR3.

 

[joevt]

the old macbook is only compatible with 30hz i guess

Are you a bot trying to reach some minimum forum post count?

 

[salamanderjuice]

It seems to be saying 4K@60 is achievable from the HDMI port. It doesn't go into details about the DisplayPort 1.2 port.
HDMI can use 4:2:0. DisplayPort 1.2 usually cannot.

I didn't notice that the dock has an MST hub. In that case you would need to get the DPCD of the MST hub and the display. My AllRez app with running on an Intel Mac can get that info. I don't know what app you would use on Linux or Windows.

Can a DisplayPort 1.2 MST hub pass unmolested DSC as long as it is using HBR2 link rate? All of my MST hubs are DisplayPort 1.4.


Did you try to create any custom timings between 100Hz and 144Hz, such as 101Hz?


Maybe the mean the limit of the SteamDeck or the limit without DSC. Or the limit of an HDMI adapter in the dock?

There should be no difference in DP chips. Either it supports HBR2 or HBR3.

They do explicitly claim the DP port does 4K @ 60Hz:

https://c1.neweggimages.com/productimage/nb640/BJMAD2305020IHBZL59.jpg

I tried to get the DPCD for a while but I can't figure it out and I don't have easy access to an Intel Mac.

I did not create custom timings but I also didn't see other options like 120 that normally appear.

And for the Valve dock, it's a limit of the dock. Same computer, same monitor, cables, etc. Only 120Hz max. And that's using the Valve dock's DP, not HDMI. Valve even mentions it on the dock tech specs.

 

[salamanderjuice]

As a follow up, I figured out how to get into my monitor's service menu. My JBCE Dock definitely is DP 1.2. It can't do the 8.1Gbps lane speed, only 5.4 even in DP 1.4 mode unlike the Valve dock or a straight USB C to DP adapter. It's doing 4:4:4 8 bit color. The monitor always said the DP lanes were 4 with all three DP adapters I have but I am not sure if that is just the total of the monitor or what's actually being used somehow. It does not mention DSC that I can tell. I think maybe I can figure that out from the amdgpu driver somehow...

Interestingly it seems like one of the Valve dock firmware updates fixed the 120Hz issue because that definitely didn't work before.

 

[joevt]

They do explicitly claim the DP port does 4K @ 60Hz:

https://c1.neweggimages.com/productimage/nb640/BJMAD2305020IHBZL59.jpg

We'll never know for sure without DPCD info from the MST hub and the display.

I did not create custom timings but I also didn't see other options like 120 that normally appear.

Can't test maximum bandwidth without being able to create custom timings. Otherwise, you'll probably only see timings advertised by the EDID of the display. What is the EDID of your display?

And for the Valve dock, it's a limit of the dock. Same computer, same monitor, cables, etc. Only 120Hz max. And that's using the Valve dock's DP, not HDMI. Valve even mentions it on the dock tech specs.

Quoting a refresh rate is not informative.
The limit of a dock or display is link rate times link width.
Divide that by the average bits per second of the display mode to get the pixel rate limit.

As a follow up, I figured out how to get into my monitor's service menu. My JBCE Dock definitely is DP 1.2. It can't do the 8.1Gbps lane speed, only 5.4 even in DP 1.4 mode unlike the Valve dock or a straight USB C to DP adapter. It's doing 4:4:4 8 bit color. The monitor always said the DP lanes were 4 with all three DP adapters I have but I am not sure if that is just the total of the monitor or what's actually being used somehow. It does not mention DSC that I can tell. I think maybe I can figure that out from the amdgpu driver somehow...

The display is getting 4 lanes from the MST hub but the MST hub is getting 2 lanes from the steam deck.
What if the MST hub has DisplayPort 1.4 input but DisplayPort 1.2 output? I don't think I've heard of an MST hub that had a reduced maximum downstream link rate compared to the upstream link rate.

I think the Steam Deck uses an AMD APU. This post says DisplayPort aux channels of Intel and AMD GPUs are exposed in Linux as devices in /dev?
https://hackaday.com/2023/07/17/displayport-under-the-hood/
There should be devices for each downstream port of the MST hub as well?

Besides devices in /dev, there may be aux channel or dpcd nodes in /sys.
https://github.com/tompreston/parse_dpcd

DPCD data is 1 MiB max (1048576 bytes). You should be able to cat dpcddevice111 > dpcdinfo111.bin to capture the entire DPCD for one device. If it's incomplete, then it might be necessary to dd the node in separate 16 byte blocks (0x10000 blocks total).

Another source of DPCD info is the logs but it doesn't include everything.
https://github.com/atseanpaul/dpcd_parser

 

[salamanderjuice]

We'll never know for sure without DPCD info from the MST hub and the display.


Can't test maximum bandwidth without being able to create custom timings. Otherwise, you'll probably only see timings advertised by the EDID of the display. What is the EDID of your display?


Quoting a refresh rate is not informative.
The limit of a dock or display is link rate times link width.
Divide that by the average bits per second of the display mode to get the pixel rate limit.


The display is getting 4 lanes from the MST hub but the MST hub is getting 2 lanes from the steam deck.
What if the MST hub has DisplayPort 1.4 input but DisplayPort 1.2 output? I don't think I've heard of an MST hub that had a reduced maximum downstream link rate compared to the upstream link rate.

I think the Steam Deck uses an AMD APU. This post says DisplayPort aux channels of Intel and AMD GPUs are exposed in Linux as devices in /dev?
https://hackaday.com/2023/07/17/displayport-under-the-hood/
There should be devices for each downstream port of the MST hub as well?

Besides devices in /dev, there may be aux channel or dpcd nodes in /sys.
https://github.com/tompreston/parse_dpcd

DPCD data is 1 MiB max (1048576 bytes). You should be able to cat dpcddevice111 > dpcdinfo111.bin to capture the entire DPCD for one device. If it's incomplete, then it might be necessary to dd the node in separate 16 byte blocks (0x10000 blocks total).

Another source of DPCD info is the logs but it doesn't include everything.
https://github.com/atseanpaul/dpcd_parser

You only get extra devices in

/dev

if you plug in two monitors into the hub. Otherwise I get the same drm_dp_aux0/1/2 with it plugged in or out. Two monitors generates an extra set of dp_aux. Seems like aux1 and 2 are for the USB C ports on my laptop as swapping ports decides which device is accessible. I've attached the dpcd bin of what should be the hub if you want and can make heads or tails of it.

I did try using dpcd_parser, it doesn't seem to let you give it the whole 1MB, only the first bit and there's some non-zero data beyond what it chokes on. I can't make much sense of it.

./dpcd_parser.py --dpcd "12 14 c2 81 01 19 01 81 38 2d 04 00 00 00 82 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00"
  0x0       DPCD_REV                                 [0x12]
    [1  4:7] Major rev                               1
    [2  0:3] Minor rev                               2
  0x1       MAX_LINK_RATE                            [0x14]
    [20 0:7] Max link rate                           5.4 Gpbs
  0x2       MAX_LANE_COUNT                           [0xc2]
    [1  7:7] Enhanced frame caps                     1
    [1  6:6] Supports TPS3 pattern                   1
    [0  5:5] Supports post-lt adjust                 0
    [2  0:4] Max lane count                          2
  0x3       MAX_DOWNSPREAD                           [0x81]
    [1  7:7] Supports TPS4 pattern                   1
    [0  6:6] Requires AUX for sync                   0
    [0  2:5] Reserved                                0
    [0  1:1] Supports stream regen bit               0
    [1  0:0] Max downspread                          <=0.5%
  0x4       NORP/DP_PWR_VOLTAGE_CAP                  [0x1]
    [0  7:7] Capable of 18V                          0
    [0  6:6] Capable of 12V                          0
    [0  5:5] Capable of 5V                           0
    [0  2:4] Reserved                                0
    [0  1:1] CRC 3D supported                        0
    [1  0:0] Number recv ports                       1
  0x5       DOWN_STREAM_PORT_PRESENT                 [0x19]
    [0  7:7] Reserved                                0
    [1  4:4] Detailed capability available           1
    [1  3:3] Branch converts format                  1
    [0  1:2] Downstream facing port type             DisplayPort
    [1  0:0] Downstream facing port present          1
  0x6       MAIN_LINK_CHANNEL_CODING                 [0x1]
    [0  2:7] Reserved                                0
    [0  1:1] Supports 128b/132b encoding             0
    [1  0:0] Supports 8b/10b encoding                1
  0x7       DOWN_STREAM_PORT_COUNT                   [0x81]
    [1  7:7] IEEE unique ID support                  1
    [0  6:6] Sink requires MSA timing                0
    [0  4:5] Reserved                                0
    [1  0:3] Downstream port count                   1
  0x8       RECEIVE_PORT0_CAP                        [0x38, 0x2d]
    [0  6:7] Reserved                                0
    [1  5:5] Buffer size per-lane/port               Per port
    [1  4:4] Buffer size units                       Bytes
    [1  3:3] HBlank expansion supported              1
    [0  2:2] usage                                   Primary stream
    [0  1:1] Local EDID present                      0
    [0  0:0] Reserved                                0
    [45 0:7] Buffer Size                             1472
  0xa       RECEIVE_PORT1_CAP                        [0x4, 0x0]
    [0  6:7] Reserved                                0
    [0  5:5] Buffer size per-lane/port               Per lane
    [0  4:4] Buffer size units                       Pixels
    [0  3:3] HBlank expansion supported              0
    [1  2:2] usage                                   Secondary stream
    [0  1:1] Local EDID present                      0
    [0  0:0] Reserved                                0
    [0  0:7] Buffer Size                             32
  0xc       I2C Speed Control Capabilities Bit Map   [0x0]
    [0  0:7] I2C speed support                       No physical i2c bus
  0xd       eDP_CONFIGURATION_CAP                    [0x0]
    [0  0:7] Reserved for eDP                        0
  0xe       TRAINING_AUX_RD_INTERVAL                 [0x82]
    [1  7:7] Extended receiver caps available        1
    [2  0:6] Training AUX read interval              ClockReqDone=100us / ChannelEqDone=8000us
  0x21      MSTM_CAP                                 [0x0]
    [0  2:7] Reserved                                0
    [0  1:1] SINGLE_STREAM_SIDEBAND_MSG_SUPPORT      0
    [0  0:0] MST_CAP                                 0

Doesn't make much sense to me.

I also tried Windows and there the AMD GPU seemed to suggest the hub was taking in 8.1 Gbps x 2 and outputting 1440@144Hz in 4:4:4 with 6 bit depth. Monitor debug info suggests 5.4Gbpsx4. Lowering the refresh enables higher bit depths.

And here's the EDID:

Block 0, Base EDID:
  EDID Structure Version & Revision: 1.4
  Vendor & Product Identification:
    Manufacturer: GSM
    Model: 23423
    Serial Number: REMOVED
    Made in: week 11 of 2020
  Basic Display Parameters & Features:
    Digital display
    Bits per primary color channel: 10
    DisplayPort interface
    Maximum image size: 60 cm x 34 cm
    Gamma: 2.20
    DPMS levels: Standby
    Supported color formats: RGB 4:4:4, YCrCb 4:4:4, YCrCb 4:2:2
    Default (sRGB) color space is primary color space
    First detailed timing includes the native pixel format and preferred refresh rate
    Display is continuous frequency
  Color Characteristics:
    Red  : 0.6855, 0.3085
    Green: 0.2646, 0.6679
    Blue : 0.1503, 0.0576
    White: 0.3134, 0.3291
  Established Timings I & II:
    DMT 0x04:   640x480    59.940 Hz   4:3    31.469 kHz  25.175 MHz
    DMT 0x06:   640x480    75.000 Hz   4:3    37.500 kHz  31.500 MHz
    DMT 0x09:   800x600    60.317 Hz   4:3    37.879 kHz  40.000 MHz
    DMT 0x0b:   800x600    75.000 Hz   4:3    46.875 kHz  49.500 MHz
    DMT 0x10:  1024x768    60.004 Hz   4:3    48.363 kHz  65.000 MHz
    DMT 0x12:  1024x768    75.029 Hz   4:3    60.023 kHz  78.750 MHz
    DMT 0x24:  1280x1024   75.025 Hz   5:4    79.976 kHz 135.000 MHz
  Standard Timings:
    CVT     :  1152x864    59.959 Hz   4:3    53.783 kHz  81.750 MHz (EDID 1.4 source)
    GTF     :  1152x864    60.000 Hz   4:3    53.700 kHz  81.624 MHz (EDID 1.3 source)
    DMT 0x23:  1280x1024   60.020 Hz   5:4    63.981 kHz 108.000 MHz
    DMT 0x55:  1280x720    60.000 Hz  16:9    45.000 kHz  74.250 MHz
    DMT 0x53:  1600x900    60.000 Hz  16:9    60.000 kHz 108.000 MHz (RB)
    DMT 0x3a:  1680x1050   59.954 Hz  16:10   65.290 kHz 146.250 MHz
    DMT 0x52:  1920x1080   60.000 Hz  16:9    67.500 kHz 148.500 MHz
    DMT 0x1c:  1280x800    59.810 Hz  16:10   49.702 kHz  83.500 MHz
    CVT     :  1920x1080   74.906 Hz  16:9    84.643 kHz 220.750 MHz (EDID 1.4 source)
    GTF     :  1920x1080   75.000 Hz  16:9    84.600 kHz 220.637 MHz (EDID 1.3 source)
  Detailed Timing Descriptors:
    DTD 1:  2560x1440  143.973 Hz  16:9   222.151 kHz 604.250 MHz (597 mm x 336 mm)
                 Hfront   48 Hsync  32 Hback  80 Hpol P
                 Vfront    3 Vsync  10 Vback  90 Vpol N
  Display Range Limits:
    Monitor ranges (Bare Limits): 48-144 Hz V, 230-230 kHz H, max dotclock 600 MHz
    Display Product Name: 'LG ULTRAGEAR'
    Display Product Serial Number: 'REMOVED'
  Extension blocks: 1
Checksum: 0x3e

----------------

Block 1, CTA-861 Extension Block:
  Revision: 3
  Basic audio support
  Supports YCbCr 4:4:4
  Supports YCbCr 4:2:2
  Native detailed modes: 1
  Audio Data Block:
    Linear PCM:
      Max channels: 2
      Supported sample rates (kHz): 48 44.1
      Supported sample sizes (bits): 24 20 16
  Colorimetry Data Block:
    BT2020YCC
    BT2020RGB
  HDR Static Metadata Data Block:
    Electro optical transfer functions:
      Traditional gamma - SDR luminance range
      SMPTE ST2084
    Supported static metadata descriptors:
      Static metadata type 1
    Desired content max luminance: 96 (400.000 cd/m^2)
    Desired content max frame-average luminance: 89 (343.724 cd/m^2)
    Desired content min luminance: 40 (0.098 cd/m^2)
  Video Data Block:
    VIC  16:  1920x1080   60.000 Hz  16:9    67.500 kHz 148.500 MHz
    VIC   4:  1280x720    60.000 Hz  16:9    45.000 kHz  74.250 MHz
    VIC   3:   720x480    59.940 Hz  16:9    31.469 kHz  27.000 MHz
    VIC   1:   640x480    59.940 Hz   4:3    31.469 kHz  25.175 MHz
    VIC  31:  1920x1080   50.000 Hz  16:9    56.250 kHz 148.500 MHz
    VIC  19:  1280x720    50.000 Hz  16:9    37.500 kHz  74.250 MHz
  Detailed Timing Descriptors:
    DTD 2:  2560x1440   59.951 Hz  16:9    88.787 kHz 241.500 MHz (597 mm x 336 mm)
                 Hfront   48 Hsync  32 Hback  80 Hpol P
                 Vfront    3 Vsync   5 Vback  33 Vpol N
    DTD 3:  2560x1440   99.946 Hz  16:9   150.919 kHz 410.500 MHz (analog composite, sync-on-green, 597 mm x 336 mm)
                 Hfront   48 Hsync  32 Hback  80 Hpol N
                 Vfront    3 Vsync  10 Vback  57 Vpol N
    DTD 4:  2560x1440  119.998 Hz  16:9   182.996 kHz 497.750 MHz (597 mm x 336 mm)
                 Hfront   48 Hsync  32 Hback  80 Hpol P
                 Vfront    3 Vsync  10 Vback  72 Vpol N
Checksum: 0xda

I don't think the monitor supports DSC, but perhaps the hub does. LG advertises it for some monitors like the LG 27GP950 and has specific menu options for it on those but not this one.

 

[joevt]

You only get extra devices in

/dev

if you plug in two monitors into the hub. Otherwise I get the same drm_dp_aux0/1/2 with it plugged in or out. Two monitors generates an extra set of dp_aux. Seems like aux1 and 2 are for the USB C ports on my laptop as swapping ports decides which device is accessible.

So aux0 is maybe the laptop's built-in display?

What's the "extra set of dp_aux"? What do you mean "Two monitors"? What are the two monitors connected to?

I've attached the dpcd bin of what should be the hub if you want and can make heads or tails of it.

I did try using dpcd_parser, it doesn't seem to let you give it the whole 1MB, only the first bit and there's some non-zero data beyond what it chokes on. I can't make much sense of it.

./dpcd_parser.py --dpcd "
12 14 c2 81 01 19 01 81 38 2d 04 00 00 00 82 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
"

Doesn't make much sense to me.

I don't know where you got the hex string from. You have everything beyond byte 16 as 00 but the bin file has non-zero values. Did you use different methods of reading the DPCD to generate the hex string and the bin file?

I also tried Windows and there the AMD GPU seemed to suggest the hub was taking in 8.1 Gbps x 2 and outputting 1440@144Hz in 4:4:4 with 6 bit depth. Monitor debug info suggests 5.4Gbpsx4. Lowering the refresh enables higher bit depths.

Suggests an MST hub with HBR3 x2 input and HBR2 x4 output. MST hubs are good for converting fast/narrow input to slow/wide output like a PCIe switch does.

HBR3 x2 6 bpc RGB or 4:4:4 allows pixel clock up to 720 MHz (1440p169 CVT-RB). But 6 bpc is poor color depth - you'll see banding unless there's a lot of dithering.

And here's the EDID:

It has these 1440p modes:
144Hz 604.250 MHz
120Hz 497.750 MHz
100Hz 410.500 MHz
60Hz 241.500 MHz

It says max dotclock 600 MHz but the 144Hz mode exceeds that. I guess this max dot clock is ignored and maybe you can get up to 720 MHz.
600 MHz is the max dot clock for HDMI (assuming 4:4:4 8bpc).

There's no mention of 4:2:0 support. What version of DP is the display set at? I wonder if the EDID changes if you change the DisplayPort version? The EDID of the HDMI port of the display will be different for sure.

Assuming no DSC and no 4:2:0, DP 1.1 can do 480 MHz with 6bpc 4:4:4 or 540 MHz with 8bpc 4:2:2 - both have 144Hz out of range but 4:2:2 should allow 120Hz.

I don't think the monitor supports DSC, but perhaps the hub does. LG advertises it for some monitors like the LG 27GP950 and has specific menu options for it on those but not this one.

The DPCD suggests the hub does not support DSC. Does that mean the hub cannot pass DSC unchanged?

I made a dumpdpcd command in my AllRez project on GitHub which can parse the DPCD data that is dumped to a binary file.

dpcd = {
    00000h: 12 14 c2 81 01 19 01 81 38 2d 04 00 00 00 82 00 // ........8-......
    00080h: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
    00100h: 1e 82 00 02 02 00 00 10 01 00 00 00 00 00 00 00 // ................
    00200h: 41 00 77 00 01 03 22 00 00 00 00 00 00 00 00 00 // A.w...".........
    00210h: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 // ................
    00240h: 00 00 00 00 00 00 20 00 00 00 00 00 00 00 00 00 // ...... .........
    00300h: 00 00 1a 38 16 00 00 00 00 11 00 00 00 00 00 00 // ...8............
    00500h: 00 e0 4c 44 70 31 2e 34 00 10 82 01 00 00 00 00 // ..LDp1.4........
    00510h: 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // (...............
    00600h: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
    02000h: 00 00 41 00 00 00 00 00 00 00 00 00 77 00 01 03 // ..A.........w...
    02200h: 14 1e c2 81 01 19 01 81 38 2d 04 00 00 00 82 00 // ........8-......
    02210h: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
    03000h: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 // ................
    03030h: 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 // ................
    68000h: 85 65 ed 4a 93 00 00 00 00 00 00 00 00 00 00 00 // .e.J............
    68020h: 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 // ................
    69000h: 00 00 00 00 00 00 00 00 00 00 00 24 a2 3c 6d 6f // ...........$.<mo
    69010h: c6 b6 5e 51 03 77 59 de 3b f0 80 06 54 ee 1a c5 // ..^Q.wY.;...T...
    69020h: 8e 56 54 63 38 1b 47 a1 8b 82 c8 2f f8 c5 d4 f4 // .VTc8.G..../....

    Receiver Capability
        00000h DPCD_REV: 1.2
        00001h MAX_LINK_RATE: HBR2
        00002h MAX_LANE_COUNT: 2, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
        00003h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5, TPS4_SUPPORTED
        00004h NORP: 2
        00005h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DisplayPort, FORMAT_CONVERSION, DETAILED_CAP_INFO_AVAILABLE
        00006h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
        00007h DOWN_STREAM_PORT_COUNT: 1, OUI_SUPPORT
        00008h RECEIVE_PORT_0_CAP_0: ?0x38
        00009h RECEIVE_PORT_0_BUFFER_SIZE: 1472 bytes per lane
        0000ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
        0000eh TRAINING_AUX_RD_INTERVAL: 8ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
        00080h DOWNSTREAM_PORT_0: PORT_TYPE = DisplayPort, HPD aware
    Link Configuration
        00100h LINK_BW_SET: HBR3
        00101h LANE_COUNT_SET: 2, ENHANCED_FRAME_EN
        00103h TRAINING_LANE0_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
        00104h TRAINING_LANE1_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
        00105h TRAINING_LANE2_SET: TRAIN_VOLTAGE_SWING_LEVEL_0, TRAIN_PRE_EMPH_LEVEL_0
        00106h TRAINING_LANE3_SET: TRAIN_VOLTAGE_SWING_LEVEL_0, TRAIN_PRE_EMPH_LEVEL_0
        00107h DOWNSPREAD_CTRL: SPREAD_AMP_0_5
        00108h MAIN_LINK_CHANNEL_CODING_SET: SET_ANSI_8B10B
    Link/Sink Device Status
        00200h SINK_COUNT: 1, SINK_CP_READY
        00202h LANE0_1_STATUS: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
        00202h LANE0_1_STATUS: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
        00203h LANE2_3_STATUS: LANE2 =
        00203h LANE2_3_STATUS: LANE3 =
        00204h LANE_ALIGN_STATUS_UPDATED: INTERLANE_ALIGN_DONE
        00205h SINK_STATUS: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
        00206h ADJUST_REQUEST_LANE0_1: LANE0 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
        00206h ADJUST_REQUEST_LANE0_1: LANE1 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
        00207h ADJUST_REQUEST_LANE2_3: LANE2 = ADJUST_VOLTAGE_SWING_LEVEL_0, ADJUST_PRE_EMPHASIS_LEVEL_0
        00207h ADJUST_REQUEST_LANE2_3: LANE3 = ADJUST_VOLTAGE_SWING_LEVEL_0, ADJUST_PRE_EMPHASIS_LEVEL_0
        00210h SYMBOL_ERROR_COUNT_LANE0: 0, valid
        00212h SYMBOL_ERROR_COUNT_LANE1: 0, valid
        00214h SYMBOL_ERROR_COUNT_LANE2: 0
        00216h SYMBOL_ERROR_COUNT_LANE3: 0
        Automated Testing Sub-Field
            00246h TEST_SINK_MISC: TST_CRC_COUNT = 0, TEST_CRC_SUPPORTED
    Source Device-Specific
        00300h SOURCE_OUI: 00-00-1A = ADVANCED MICRO DEVICES
        00303h SOURCE_ID: 38 16 00 00 00 00 // 8.....
        00309h SOURCE_HW_REV: 1.1
    Branch Device-Specific
        00500h BRANCH_OUI: 00-E0-4C = REALTEK SEMICONDUCTOR CORP.
        00503h BRANCH_ID: 44 70 31 2e 34 00 // Dp1.4.
        00509h BRANCH_HW_REV: 1.0
        0050ah BRANCH_SW_REV: 130.1
        00510h : 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // (...............
    Sink Control
        00600h SET_POWER: SET_POWER_D0
    DPRX ESI (Event Status Indicator)
        02002h SINK_COUNT_ESI: 1, SINK_CP_READY
        0200ch LANE0_1_STATUS_ESI: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
        0200ch LANE0_1_STATUS_ESI: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
        0200dh LANE2_3_STATUS_ESI: LANE2 =
        0200dh LANE2_3_STATUS_ESI: LANE3 =
        0200eh LANE_ALIGN_STATUS_UPDATED_ESI: INTERLANE_ALIGN_DONE
        0200fh SINK_STATUS_ESI: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
    Extended Receiver Capability
        02200h DP13_DPCD_REV: 1.4
        02201h MAX_LINK_RATE: HBR3
        02202h MAX_LANE_COUNT: 2, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
        02203h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5, TPS4_SUPPORTED
        02204h NORP: 2
        02205h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DisplayPort, FORMAT_CONVERSION, DETAILED_CAP_INFO_AVAILABLE
        02206h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
        02207h DOWN_STREAM_PORT_COUNT: 1, OUI_SUPPORT
        02208h RECEIVE_PORT_0_CAP_0: ?0x38
        02209h RECEIVE_PORT_0_BUFFER_SIZE: 1472 bytes per lane
        0220ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
        0220eh TRAINING_AUX_RD_INTERVAL: 8ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
        02210h DPRX_FEATURE_ENUMERATION_LIST: VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED
    PCON HDMI CONFIG PPS Override Buffer
        0300fh CEC_LOGICAL_ADDRESS_MASK_2: CEC_LOGICAL_ADDRESS_15
        03030h : 00 00 00 00 03 00 // ......
    HDCP 1.3 and HDCP 2.2
        68000h AUX_HDCP_BKSV: 85 65 ed 4a 93 // .e.J.
        68028h AUX_HDCP_BCAPS: BCAPS_HDCP_CAPABLE, BCAPS_REPEATER_PRESENT
    DP HDCP 2.2 Parameters
        6900bh HDCP_2_2_REG_CERT_RX: 24 a2 3c 6d 6f // $.<mo
        69010h : c6 b6 5e 51 03 77 59 de 3b f0 80 06 54 ee 1a c5 // ..^Q.wY.;...T...
        69020h : 8e 56 54 63 38 1b 47 a1 8b 82 c8 2f f8 c5 d4 f4 // .VTc8.G..../....
        69030h : 59 7d bc 5e a8 47 e1 50 5a 74 50 fe 82 71 c6 03 // Y}.^.G.PZtP..q..
        69040h : 53 bd 4a 55 02 cd 32 84 9a 22 11 5a 3c 0f 41 bd // S.JU..2..".Z<.A.
        69050h : 7a 5f 88 76 11 3f 95 02 cc e2 35 7e d2 93 a2 d7 // z_.v.?....5~....
        69060h : 23 df b5 0a 89 47 d0 8d 50 07 b5 61 31 3d 23 54 // #....G..P..a1=#T
        69070h : 32 e1 77 90 67 18 a3 5a f0 5a f9 d4 16 f2 28 41 // 2.w.g..Z.Z....(A
        69080h : 25 57 32 9a a5 c5 49 65 14 f7 0a 61 cc 64 56 49 // %W2...Ie...a.dVI
        69090h : 01 00 01 10 00 84 8a c1 a1 1c 0a c5 5d 9a ca 25 // ............]..%
        690a0h : f0 ee 09 91 14 c8 c1 e9 49 7d 1a 9e a5 a6 ea 71 // ........I}.....q
        690b0h : 30 31 29 d0 e1 53 05 67 30 d7 33 7e d3 54 16 90 // 01)..S.g0.3~.T..
        690c0h : c7 5e 68 07 98 83 c8 86 26 ec 0c 9d 38 d0 7d b9 // .^h.....&...8.}.
        690d0h : 84 a8 65 e9 ec ff d3 e9 1b 6b f5 ac bf 01 68 30 // ..e......k....h0
        690e0h : 91 93 6e 6c 93 85 d3 15 9a 11 43 b9 5b a7 e3 07 // ..nl......C.[...
        690f0h : 18 a1 bf 6c 45 64 f5 22 44 55 84 15 22 4a 13 59 // ...lEd."DU.."J.Y
        69100h : d9 06 4f f5 be 5f ef 48 aa 9b 4d a4 f0 a7 cc 67 // ..O.._.H..M....g
        69110h : fd 06 99 74 2f 65 40 90 01 5a 9d b6 87 bc 98 77 // ...t/e@..Z.....w
        69120h : dd 61 81 37 10 f3 23 b4 72 df 87 df 2b 9d 05 86 // .a.7..#.r...+...
        69130h : 79 2d 32 6d b0 d0 dc 9d 2f 6a 04 65 79 eb 0a 45 // y-2m..../j.ey..E
        69140h : 18 73 3e 85 d4 30 72 8a 3b 31 56 1d f5 c4 79 81 // .s>..0r.;1V...y.
        69150h : 14 e2 a6 fd a4 80 42 36 90 94 35 26 5b 7c e7 98 // ......B6..5&[|..
        69160h : 20 62 48 c6 35 f1 6b 8c bb 40 fd 7a 6a 31 31 da //  bH.5.k..@.zj11.
        69170h : 50 dd bc 29 fb 14 38 16 7c f9 e0 82 4a 55 fd 48 // P..)..8.|...JU.H
        69180h : 28 0f 98 b9 92 8a 12 31 fc 91 a4 ea 8b 30 07 1d // (......1.....0..
        69190h : 15 b1 c3 8e 51 58 cf 6e bf b6 85 2b 41 07 cc b0 // ....QX.n...+A...
        691a0h : f8 c1 19 1c be 30 9f 55 91 89 c4 fe b0 2e dc 3f // .....0.U.......?
        691b0h : 2a c3 f3 a2 ac dc 9f d0 a0 e4 2e f3 12 29 b2 70 // *............).p
        691c0h : 53 05 4e 42 2a 82 9e b7 98 67 62 4c 64 cb 66 85 // S.NB*....gbLd.f.
        691d0h : 11 1a c8 93 12 89 2c 1b 9b 02 21 17 a7 34 ef 1a // ......,...!..4..
        691e0h : 15 da 52 fe be c5 73 c7 8d e9 60 bd 93 7e d4 11 // ..R...s...`..~..
        691f0h : e9 7a 61 9c c6 fc d6 bd 9b b5 8d 54 9d 8c 73 e5 // .za........T..s.
        69200h : c1 bc b1 6d 13 99 e5 d4 c1 0a 42 49 00 5f e7 f4 // ...m......BI._..
        69210h : 0c bb 41 35 fd // ..A5.
        6921dh HDCP_2_2_REG_RX_CAPS: VERSION = 2, RECEIVER_CAPABILITY_MASK = 0, HDCP_CAPABLE, REPEATER
    Undefined
        ffff0h : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 // ................
}; // dpcd

You see that there's no DSC info in this dump (its all zeros). Here's some of the important parts:
LINK_BW_SET: HBR3
LANE_COUNT_SET: 2
DOWN_STREAM_PORT_COUNT: 1
DOWNSTREAM_PORT_0: PORT_TYPE = DisplayPort
SINK_COUNT: 1
SOURCE_OUI: 00-00-1A = ADVANCED MICRO DEVICES <-- your graphics card
BRANCH_OUI: 00-E0-4C = REALTEK SEMICONDUCTOR CORP. <-- the MST hub? Don't know what model or why there's only one downstream port.

You can get DPCD info for the display if it is connected to the laptop instead of the MST hub of your USB-C dock.

Linux doesn't expose dp aux channel devices for getting DPCD from downstream ports of MST hubs directly? I suppose you need to daisy chain some MST hubs to be sure.

It may be possible to send sideband messages to the dp aux device to access DPCD from downstream MST ports indirectly but that's a little more complicated.
Basically, you create a request for some bytes of the downstream DPCD (the request includes a path to navigate the MST hub topology), write the request to some bytes in the DPCD of the first device, and get a response.
My AllRez app does that. Maybe its code can be converted to a unix shell script (if you don't want to find a linux api to do it in a C app).

 

[salamanderjuice]

So aux0 is maybe the laptop's built-in display?

What's the "extra set of dp_aux"? What do you mean "Two monitors"? What are the two monitors connected to?


I don't know where you got the hex string from. You have everything beyond byte 16 as 00 but the bin file has non-zero values. Did you use different methods of reading the DPCD to generate the hex string and the bin file?


Suggests an MST hub with HBR3 x2 input and HBR2 x4 output. MST hubs are good for converting fast/narrow input to slow/wide output like a PCIe switch does.

HBR3 x2 6 bpc RGB or 4:4:4 allows pixel clock up to 720 MHz (1440p169 CVT-RB). But 6 bpc is poor color depth - you'll see banding unless there's a lot of dithering.


It has these 1440p modes:
144Hz 604.250 MHz
120Hz 497.750 MHz
100Hz 410.500 MHz
60Hz 241.500 MHz

It says max dotclock 600 MHz but the 144Hz mode exceeds that. I guess this max dot clock is ignored and maybe you can get up to 720 MHz.
600 MHz is the max dot clock for HDMI (assuming 4:4:4 8bpc).

There's no mention of 4:2:0 support. What version of DP is the display set at? I wonder if the EDID changes if you change the DisplayPort version? The EDID of the HDMI port of the display will be different for sure.

Assuming no DSC and no 4:2:0, DP 1.1 can do 480 MHz with 6bpc 4:4:4 or 540 MHz with 8bpc 4:2:2 - both have 144Hz out of range but 4:2:2 should allow 120Hz.


The DPCD suggests the hub does not support DSC. Does that mean the hub cannot pass DSC unchanged?

I made a dumpdpcd command in my AllRez project on GitHub which can parse the DPCD data that is dumped to a binary file.

dpcd = {
    00000h: 12 14 c2 81 01 19 01 81 38 2d 04 00 00 00 82 00 // ........8-......
    00080h: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
    00100h: 1e 82 00 02 02 00 00 10 01 00 00 00 00 00 00 00 // ................
    00200h: 41 00 77 00 01 03 22 00 00 00 00 00 00 00 00 00 // A.w...".........
    00210h: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00 // ................
    00240h: 00 00 00 00 00 00 20 00 00 00 00 00 00 00 00 00 // ...... .........
    00300h: 00 00 1a 38 16 00 00 00 00 11 00 00 00 00 00 00 // ...8............
    00500h: 00 e0 4c 44 70 31 2e 34 00 10 82 01 00 00 00 00 // ..LDp1.4........
    00510h: 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // (...............
    00600h: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
    02000h: 00 00 41 00 00 00 00 00 00 00 00 00 77 00 01 03 // ..A.........w...
    02200h: 14 1e c2 81 01 19 01 81 38 2d 04 00 00 00 82 00 // ........8-......
    02210h: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
    03000h: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 // ................
    03030h: 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 // ................
    68000h: 85 65 ed 4a 93 00 00 00 00 00 00 00 00 00 00 00 // .e.J............
    68020h: 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 // ................
    69000h: 00 00 00 00 00 00 00 00 00 00 00 24 a2 3c 6d 6f // ...........$.<mo
    69010h: c6 b6 5e 51 03 77 59 de 3b f0 80 06 54 ee 1a c5 // ..^Q.wY.;...T...
    69020h: 8e 56 54 63 38 1b 47 a1 8b 82 c8 2f f8 c5 d4 f4 // .VTc8.G..../....

    Receiver Capability
        00000h DPCD_REV: 1.2
        00001h MAX_LINK_RATE: HBR2
        00002h MAX_LANE_COUNT: 2, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
        00003h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5, TPS4_SUPPORTED
        00004h NORP: 2
        00005h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DisplayPort, FORMAT_CONVERSION, DETAILED_CAP_INFO_AVAILABLE
        00006h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
        00007h DOWN_STREAM_PORT_COUNT: 1, OUI_SUPPORT
        00008h RECEIVE_PORT_0_CAP_0: ?0x38
        00009h RECEIVE_PORT_0_BUFFER_SIZE: 1472 bytes per lane
        0000ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
        0000eh TRAINING_AUX_RD_INTERVAL: 8ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
        00080h DOWNSTREAM_PORT_0: PORT_TYPE = DisplayPort, HPD aware
    Link Configuration
        00100h LINK_BW_SET: HBR3
        00101h LANE_COUNT_SET: 2, ENHANCED_FRAME_EN
        00103h TRAINING_LANE0_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
        00104h TRAINING_LANE1_SET: TRAIN_VOLTAGE_SWING_LEVEL_2, TRAIN_PRE_EMPH_LEVEL_0
        00105h TRAINING_LANE2_SET: TRAIN_VOLTAGE_SWING_LEVEL_0, TRAIN_PRE_EMPH_LEVEL_0
        00106h TRAINING_LANE3_SET: TRAIN_VOLTAGE_SWING_LEVEL_0, TRAIN_PRE_EMPH_LEVEL_0
        00107h DOWNSPREAD_CTRL: SPREAD_AMP_0_5
        00108h MAIN_LINK_CHANNEL_CODING_SET: SET_ANSI_8B10B
    Link/Sink Device Status
        00200h SINK_COUNT: 1, SINK_CP_READY
        00202h LANE0_1_STATUS: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
        00202h LANE0_1_STATUS: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
        00203h LANE2_3_STATUS: LANE2 =
        00203h LANE2_3_STATUS: LANE3 =
        00204h LANE_ALIGN_STATUS_UPDATED: INTERLANE_ALIGN_DONE
        00205h SINK_STATUS: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
        00206h ADJUST_REQUEST_LANE0_1: LANE0 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
        00206h ADJUST_REQUEST_LANE0_1: LANE1 = ADJUST_VOLTAGE_SWING_LEVEL_2, ADJUST_PRE_EMPHASIS_LEVEL_0
        00207h ADJUST_REQUEST_LANE2_3: LANE2 = ADJUST_VOLTAGE_SWING_LEVEL_0, ADJUST_PRE_EMPHASIS_LEVEL_0
        00207h ADJUST_REQUEST_LANE2_3: LANE3 = ADJUST_VOLTAGE_SWING_LEVEL_0, ADJUST_PRE_EMPHASIS_LEVEL_0
        00210h SYMBOL_ERROR_COUNT_LANE0: 0, valid
        00212h SYMBOL_ERROR_COUNT_LANE1: 0, valid
        00214h SYMBOL_ERROR_COUNT_LANE2: 0
        00216h SYMBOL_ERROR_COUNT_LANE3: 0
        Automated Testing Sub-Field
            00246h TEST_SINK_MISC: TST_CRC_COUNT = 0, TEST_CRC_SUPPORTED
    Source Device-Specific
        00300h SOURCE_OUI: 00-00-1A = ADVANCED MICRO DEVICES
        00303h SOURCE_ID: 38 16 00 00 00 00 // 8.....
        00309h SOURCE_HW_REV: 1.1
    Branch Device-Specific
        00500h BRANCH_OUI: 00-E0-4C = REALTEK SEMICONDUCTOR CORP.
        00503h BRANCH_ID: 44 70 31 2e 34 00 // Dp1.4.
        00509h BRANCH_HW_REV: 1.0
        0050ah BRANCH_SW_REV: 130.1
        00510h : 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // (...............
    Sink Control
        00600h SET_POWER: SET_POWER_D0
    DPRX ESI (Event Status Indicator)
        02002h SINK_COUNT_ESI: 1, SINK_CP_READY
        0200ch LANE0_1_STATUS_ESI: LANE0 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
        0200ch LANE0_1_STATUS_ESI: LANE1 = CR_DONE, CHANNEL_EQ_DONE, SYMBOL_LOCKED
        0200dh LANE2_3_STATUS_ESI: LANE2 =
        0200dh LANE2_3_STATUS_ESI: LANE3 =
        0200eh LANE_ALIGN_STATUS_UPDATED_ESI: INTERLANE_ALIGN_DONE
        0200fh SINK_STATUS_ESI: RECEIVE_PORT_0_STATUS, RECEIVE_PORT_1_STATUS
    Extended Receiver Capability
        02200h DP13_DPCD_REV: 1.4
        02201h MAX_LINK_RATE: HBR3
        02202h MAX_LANE_COUNT: 2, ENHANCED_FRAME_CAP, TPS3_SUPPORTED
        02203h MAX_DOWNSPREAD: MAX_DOWNSPREAD_0_5, TPS4_SUPPORTED
        02204h NORP: 2
        02205h DOWNSTREAMPORT_PRESENT: DWN_STRM_PORT_PRESENT, PORT_TYPE = DisplayPort, FORMAT_CONVERSION, DETAILED_CAP_INFO_AVAILABLE
        02206h MAIN_LINK_CHANNEL_CODING: CAP_ANSI_8B10B
        02207h DOWN_STREAM_PORT_COUNT: 1, OUI_SUPPORT
        02208h RECEIVE_PORT_0_CAP_0: ?0x38
        02209h RECEIVE_PORT_0_BUFFER_SIZE: 1472 bytes per lane
        0220ah RECEIVE_PORT_1_CAP_0: ASSOCIATED_TO_PRECEDING_PORT
        0220eh TRAINING_AUX_RD_INTERVAL: 8ms all, EXTENDED_RECEIVER_CAP_FIELD_PRESENT
        02210h DPRX_FEATURE_ENUMERATION_LIST: VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED
    PCON HDMI CONFIG PPS Override Buffer
        0300fh CEC_LOGICAL_ADDRESS_MASK_2: CEC_LOGICAL_ADDRESS_15
        03030h : 00 00 00 00 03 00 // ......
    HDCP 1.3 and HDCP 2.2
        68000h AUX_HDCP_BKSV: 85 65 ed 4a 93 // .e.J.
        68028h AUX_HDCP_BCAPS: BCAPS_HDCP_CAPABLE, BCAPS_REPEATER_PRESENT
    DP HDCP 2.2 Parameters
        6900bh HDCP_2_2_REG_CERT_RX: 24 a2 3c 6d 6f // $.<mo
        69010h : c6 b6 5e 51 03 77 59 de 3b f0 80 06 54 ee 1a c5 // ..^Q.wY.;...T...
        69020h : 8e 56 54 63 38 1b 47 a1 8b 82 c8 2f f8 c5 d4 f4 // .VTc8.G..../....
        69030h : 59 7d bc 5e a8 47 e1 50 5a 74 50 fe 82 71 c6 03 // Y}.^.G.PZtP..q..
        69040h : 53 bd 4a 55 02 cd 32 84 9a 22 11 5a 3c 0f 41 bd // S.JU..2..".Z<.A.
        69050h : 7a 5f 88 76 11 3f 95 02 cc e2 35 7e d2 93 a2 d7 // z_.v.?....5~....
        69060h : 23 df b5 0a 89 47 d0 8d 50 07 b5 61 31 3d 23 54 // #....G..P..a1=#T
        69070h : 32 e1 77 90 67 18 a3 5a f0 5a f9 d4 16 f2 28 41 // 2.w.g..Z.Z....(A
        69080h : 25 57 32 9a a5 c5 49 65 14 f7 0a 61 cc 64 56 49 // %W2...Ie...a.dVI
        69090h : 01 00 01 10 00 84 8a c1 a1 1c 0a c5 5d 9a ca 25 // ............]..%
        690a0h : f0 ee 09 91 14 c8 c1 e9 49 7d 1a 9e a5 a6 ea 71 // ........I}.....q
        690b0h : 30 31 29 d0 e1 53 05 67 30 d7 33 7e d3 54 16 90 // 01)..S.g0.3~.T..
        690c0h : c7 5e 68 07 98 83 c8 86 26 ec 0c 9d 38 d0 7d b9 // .^h.....&...8.}.
        690d0h : 84 a8 65 e9 ec ff d3 e9 1b 6b f5 ac bf 01 68 30 // ..e......k....h0
        690e0h : 91 93 6e 6c 93 85 d3 15 9a 11 43 b9 5b a7 e3 07 // ..nl......C.[...
        690f0h : 18 a1 bf 6c 45 64 f5 22 44 55 84 15 22 4a 13 59 // ...lEd."DU.."J.Y
        69100h : d9 06 4f f5 be 5f ef 48 aa 9b 4d a4 f0 a7 cc 67 // ..O.._.H..M....g
        69110h : fd 06 99 74 2f 65 40 90 01 5a 9d b6 87 bc 98 77 // ...t/e@..Z.....w
        69120h : dd 61 81 37 10 f3 23 b4 72 df 87 df 2b 9d 05 86 // .a.7..#.r...+...
        69130h : 79 2d 32 6d b0 d0 dc 9d 2f 6a 04 65 79 eb 0a 45 // y-2m..../j.ey..E
        69140h : 18 73 3e 85 d4 30 72 8a 3b 31 56 1d f5 c4 79 81 // .s>..0r.;1V...y.
        69150h : 14 e2 a6 fd a4 80 42 36 90 94 35 26 5b 7c e7 98 // ......B6..5&[|..
        69160h : 20 62 48 c6 35 f1 6b 8c bb 40 fd 7a 6a 31 31 da //  bH.5.k..@.zj11.
        69170h : 50 dd bc 29 fb 14 38 16 7c f9 e0 82 4a 55 fd 48 // P..)..8.|...JU.H
        69180h : 28 0f 98 b9 92 8a 12 31 fc 91 a4 ea 8b 30 07 1d // (......1.....0..
        69190h : 15 b1 c3 8e 51 58 cf 6e bf b6 85 2b 41 07 cc b0 // ....QX.n...+A...
        691a0h : f8 c1 19 1c be 30 9f 55 91 89 c4 fe b0 2e dc 3f // .....0.U.......?
        691b0h : 2a c3 f3 a2 ac dc 9f d0 a0 e4 2e f3 12 29 b2 70 // *............).p
        691c0h : 53 05 4e 42 2a 82 9e b7 98 67 62 4c 64 cb 66 85 // S.NB*....gbLd.f.
        691d0h : 11 1a c8 93 12 89 2c 1b 9b 02 21 17 a7 34 ef 1a // ......,...!..4..
        691e0h : 15 da 52 fe be c5 73 c7 8d e9 60 bd 93 7e d4 11 // ..R...s...`..~..
        691f0h : e9 7a 61 9c c6 fc d6 bd 9b b5 8d 54 9d 8c 73 e5 // .za........T..s.
        69200h : c1 bc b1 6d 13 99 e5 d4 c1 0a 42 49 00 5f e7 f4 // ...m......BI._..
        69210h : 0c bb 41 35 fd // ..A5.
        6921dh HDCP_2_2_REG_RX_CAPS: VERSION = 2, RECEIVER_CAPABILITY_MASK = 0, HDCP_CAPABLE, REPEATER
    Undefined
        ffff0h : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 // ................
}; // dpcd

You see that there's no DSC info in this dump (its all zeros). Here's some of the important parts:
LINK_BW_SET: HBR3
LANE_COUNT_SET: 2
DOWN_STREAM_PORT_COUNT: 1
DOWNSTREAM_PORT_0: PORT_TYPE = DisplayPort
SINK_COUNT: 1
SOURCE_OUI: 00-00-1A = ADVANCED MICRO DEVICES <-- your graphics card
BRANCH_OUI: 00-E0-4C = REALTEK SEMHICONDUCTOR CORP. <-- the MST hub? Don't know what model or why there's only one downstream port.

You can get DPCD info for the display if it is connected to the laptop instead of the MST hub of your USB-C dock.

Linux doesn't expose dp aux channel devices for getting DPCD from downstream ports of MST hubs directly? I suppose you need to daisy chain some MST hubs to be sure.

It may be possible to send sideband messages to the dp aux device to access DPCD from downstream MST ports indirectly but that's a little more complicated.
Basically, you create a request for some bytes of the downstream DPCD (the request includes a path to navigate the MST hub topology), write the request to some bytes in the DPCD of the first device, and get a response.
My AllRez app does that. Maybe its code can be converted to a unix shell script (if you don't want to find a linux api to do it in a C app).

With one monitor connected to the dock DP port you see dp_aux0/1/2 in /dev. If I plug another monitor into the dock HDMI port then dp_aux3/4/5 appear. dp_aux0 is the built-in eDP screen of the laptop.

The hex string came from doing xxd on the dp_aux device directly, I had swapped some cables and things around too so maybe something had changed there.

I generated that EDID with the monitor set to DP 1.4. The EDID does change a little when you change the DP version and the HDMI port is different (you can do a 4K @ 60Hz for example which obviously is downscaled). The monitor doesn't do 4:2:0 as I already said. It's not in the spec sheet.

When I was testing on Windows, when using DP 1.1 mode on the monitor you could use 1440p 120Hz with 4:2:2.

I will check out your dumpdpcd command.

 

[joevt]

With one monitor connected to the dock DP port you see dp_aux0/1/2 in /dev. If I plug another monitor into the dock HDMI port then dp_aux3/4/5 appear. dp_aux0 is the built-in eDP screen of the laptop.

Ok, so 3/4/5 is probably the MST hub which seems to switch from a pass through mode when only one display is connected, to a multi mode when more than one display is connected?

It might be informative to get DPCD for 0/1/2 with one display connected to dock. Then again for 0/1/2/3/4/5 with two displays connected to the dock.
Then again with display directly to the laptop.

The hex string came from doing xxd on the dp_aux device directly, I had swapped some cables and things around too so maybe something had changed there.

So the hex string was like this cat /dev/drm_dp_aux2 | xxd
and the .bin file was like this cat /dev/drm_dp_aux2 > aux2.bin
?

I generated that EDID with the monitor set to DP 1.4. The EDID does change a little when you change the DP version and the HDMI port is different (you can do a 4K @ 60Hz for example which obviously is downscaled). The monitor doesn't do 4:2:0 as I already said. It's not in the spec sheet.

HDMI usually can do some modes with 4:2:0. There's a CTA-861 block for modes that can do 4:2:0 with 4:2:2 or 4:4:4 and another block for modes that can only be done with 4:2:0.
I see these 4:2:0 blocks don't exist for the DisplayPort connector. HDMI might be the same or different, depending on the display controllers used.

 

[Scrooge MacDuck]

So, - reporting in! @joevt was right: only USB 2 docks do the trick. Seems to be the crux of the entire matter. Ended up buyin' this one here: https://www.amazon.de/dp/B0CRTJ3778

The laptop seems to be performing decently with both screens on.

Thanks everyone for your time and patience!

 

[drrich2]

Glad to hear things worked out. I, too, have a 2017 12" MacBook, which I use sporadically. Years ago, I picked up a Philips Brilliance 279P1 4K 27" display, and thankfully due to user reviews on Amazon knew to be on the lookout for a frame rate problem but with a solution.

If I let the display's built-in hub keep the USB ports at version 3 speeds, I'd get 4K at 30 Hz, but if I went into the display's settings and set the USB ports in the display's hub to version 2 speeds, I'd get 4K at 60 Hz. Oddly, review J. T. Rhea on April 5, 2023, noted "And I had no problem getting 60fps at 4K and still getting the USB 3 speeds as many have complained. Perhaps that's an issue with M1 Macs but my M2 laptop had no issues."

So I guess 'your mileage may vary?' This sort of thing is why when dock shopping I picked up a used CalDigit TS3+ rather than a USB-C dock; I wanted the main data pipeline between dock and Mac to have plenty of throughput capacity.

 

[joevt]

Glad to hear things worked out. I, too, have a 2017 12" MacBook, which I use sporadically. Years ago, I picked up a Philips Brilliance 279P1 4K 27" display, and thankfully due to user reviews on Amazon knew to be on the lookout for a frame rate problem but with a solution.

If I let the display's built-in hub keep the USB ports at version 3 speeds, I'd get 4K at 30 Hz, but if I went into the display's settings and set the USB ports in the display's hub to version 2 speeds, I'd get 4K at 60 Hz. Oddly, review J. T. Rhea on April 5, 2023, noted "And I had no problem getting 60fps at 4K and still getting the USB 3 speeds as many have complained. Perhaps that's an issue with M1 Macs but my M2 laptop had no issues."

So I guess 'your mileage may vary?' This sort of thing is why when dock shopping I picked up a used CalDigit TS3+ rather than a USB-C dock; I wanted the main data pipeline between dock and Mac to have plenty of throughput capacity.

The Philips Brilliance 279P1 support DisplayPort 1.4 input. With 2 lanes of HBR3, it can do 4K60 8bpc RGB.
2017 12" MacBook is limited to HBR2 link rate.
TS3+ is limited to HBR2 link rate.

 

[drrich2]

TS3+ is limited to HBR2 link rate.

One thing I'll add; the CalDigit TS3+ USB-C ports don't support video out; for that, one needs use the single Thunderbolt 3 port or the DisplayPort. This is not unique amongst Thunderbolt docks, but was a surprise to me. Then again, when we got our kid a Windows notebook, I was surprised to learn its USB-C port was data only, no video. Between that and the frequency with which old versions of DisplayPort and HDMI are included in products selling fairly recently, it's become a case of 'read the fine print.' Since my old 2017 MacBook supported USB-C DisplayPort Alt. Mode (albeit DisplayPort 1.2), I just thought that was a feature of USB-C! Nope. Thanks for the motion about HBR2 and 3; wasn't familiar with HBR.

 

[joevt]

One thing I'll add; the CalDigit TS3+ USB-C ports don't support video out; for that, one needs use the single Thunderbolt 3 port or the DisplayPort. This is not unique amongst Thunderbolt docks, but was a surprise to me. Then again, when we got our kid a Windows notebook, I was surprised to learn its USB-C port was data only, no video. Between that and the frequency with which old versions of DisplayPort and HDMI are included in products selling fairly recently, it's become a case of 'read the fine print.' Since my old 2017 MacBook supported USB-C DisplayPort Alt. Mode (albeit DisplayPort 1.2), I just thought that was a feature of USB-C! Nope. Thanks for the motion about HBR2 and 3; wasn't familiar with HBR.

Adding a USB-C port that also supports USB-C DisplayPort Alt Mode requires adding more chips = cost.

See, for example, the HP Thunderbolt Dock G2, which adds internally an MST hub, a VGA adapter, and a MUX between the VGA port and the USB-C with DisplayPort Alt Mode port. The pair (VGA/USB-C) is provided by one of the 3 downstream ports of the MST hub - the other two are DisplayPort with DisplayPort Dual Mode (DP++) capability for passive DisplayPort to HDMI adapters. I don't know if the HDMI adapters necessary to support DP Dual Mode are included in the MST hub or are more separate chips.

 

[macnavarra]

Macs are really getting on my nerves recently 😀 Dell P2415Qb, Rev. A12 (well into 4K @ 60 Hz supported range). Yet no matter if HDMI 1.4 is enabled or disabled in Dell's 'secret' menu, the only options in Displays are 23, 24, and 30 Hz. MacBook 12" 2017. Baseus USB-C-to-HDMI adapter (hub). Could the latter be the culprit?

Example: https://discussions.apple.com/thread/255032590?sortBy=rank .

 

[Scrooge MacDuck]

Also, it's interesting how DP doesn't seem to work with this setup. At least the monitor can't detect any signal over it.