Nobody is seeing CPU instability. And since the size of the transistor has nothing to do with the node size, we aren’t particularly close yet to their being an insurmountable issue with quantum tunneling. Right now, we’ve switched to 3D transistor gate structures to allow an more consistent electric field to enable the transistors to fully turn off (thus preventing static leakage current). There are new gate structures on the roadmap over the next few years that will prevent leakage even as the transistors get smaller.
And once we reach the threshold where the size is such that the transistors cannot be turned off, there are multiple other solutions (for example, compound semiconductors with heterojunctions, different transistor types such as HBTs that rely on vertical distances instead of horizontal, etc.)